3
P M C / P C I I N T E R F A C E
PCI 6254 Configuration Registers
ACh
D0h
D4h
D8h
DCh
E0h
E4h
E8h
ECh
F0h
reserved
Extended Register Index | reserved |
| reserved | reserved |
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| Extended Registers Dataport |
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| reserved |
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Power Management Capabilities |
| Next Item Pointer=E4 | Capability ID=01 | |
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Power Management Data | PMCSR Bridge Support |
| Power Management CSR | |
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reserved | HSCSR=00 |
| Next Item Pointer=E8 | Capability ID=06 |
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VPD Register=0000 |
| Next Item Pointer=00 | Capability ID=03 | |
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| VPD Data Register=0000_0000 |
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| reserved |
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Register
PCI6254 Configuration Registers–
Non-Transparent Mode
Primary | 31 | 24 | 23 | 16 | 15 | 8 | 7 | 0 |
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00h |
| Device ID |
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| Vendor ID |
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04h |
| Primary Status |
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| Primary Command |
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08h |
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| Class Code |
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| Revision ID |
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0Ch | BIST |
| Header Type |
| Primary Latency Time | Primary Cache Line Size | ||
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10h |
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| Downstream I/O or Memory 0 Bar |
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14h |
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| Downstream Memory 1 Bar |
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18h |
| Downstream Memory 2 Bar or Downstream Memory 1 Bar Upper 32 bits |
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1Ch |
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| reserved |
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2Ch |
| Subsystem ID |
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| Subsystem Vendor ID |
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30h |
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| reserved |
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34h |
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| reserved |
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| Capability Pointer |
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