Emerson CC1000DM user manual 38h Reserved

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	P M C / P C I I N T E R F A C E	.
	P M C / P C I I N T E R F A C E	.
	PCI 6254 Configuration Registers	.
	PCI 6254 Configuration Registers	.
		.
		. .

38h			reserved

3Ch	Primary Maximum Latency		Primary Minimum Grant	Primary Interrupt Pin		Primary Interrupt Line

40h	Device ID			Vendor ID

44h	Secondary Status			Secondary Command

48h			Class Code			Revision ID

4Ch	BIST		Header Type	Secondary Latency Timer		Secondary Cache Line Size

50h			Upstream I/O or Memory 0 Bar

54h			Upstream Memory 1 Bar

58h		Upstream Memory 2 Bar or Upstream Memory 1 Bar Upper 32 bits

5Ch			reserved

6Ch	Subsystem ID			Subsystem Vendor ID

70h			reserved

74h			reserved			Capability Pointer

78h			reserved

7Ch	Secondary Max Latency		Secondary Minimum Grant	Secondary Interrupt Pin		Secondary Interrupt Line

80h			XB Downstream Configuration Address

84h			XB Downstream Configuration Dataport

88h			XB Upstream Configuration Address

8Ch			XB Upstream Configuration Dataport

90h	reserved		XB Config Access	XB Upstream Config Own		XB Downstream Config
90h	reserved		Semaphore Status	Semaphore		Own Semaphore
			Semaphore Status	Semaphore		Own Semaphore
94h
94h	reserved		SERR* Event Disable	Clock Control

98h	GPIO[3-0] Input Data		GPIO[3-0] Output Enable	GPIO[3-0] Output Data		SERR* Status
98h	GPIO[3-0] Input Data		Control	GPIO[3-0] Output Data		SERR* Status
			Control

10004281-02

CC1000dm User’s Manual 3-9

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Contents CC1000dm Revision Level Principal Changes Date Regulatory Agency Warnings & Notices EC Declaration of Conformity Contents Bridge Eeprom PCI Bridge Features PMC Module InstallationFigures G u r e s Tables Ta b l e s Registers G i s t e r s Overview Functional Overview N. .C.T.I.O. N. .A. L. . O. .V.E. R. .V.I.E.WRoHS Compliance Type SpecificationProduct Certification Technical References Terminology and NotationAdditional Information Device / Interface DocumentDocument 6CC1000dm User’s Manual 10004281-02 Width Depth SetupComponent Map, Top rev CC1000dm Circuit BoardCC1000dm Circuit Board Identification Numbers Connectors Fuses and Jumpers Jumper/Header Locations, Top View Multiple Option Selection JP3 CC1000dm SetupSignal Name Bit Selection CC1000dm SetupPin Signal Signal NameBit Selection Jumper Jumper Position ModeSelEnvironmental Considerations Power RequirementsOperational Checks Typical Current Voltage Range AmpsS. E. .T. .M. E. .T.H. O. .D.S Non-transparent Reset MethodsO. U. .B. L. E. .S.H. O. .O. T. I. N. .G Troubleshooting14CC1000dm User’s Manual 10004281-02 PMC/PCI Interface Device Mapping PMC Module InstallationC / P C I I N T E R F a C E VoltsTiming Interrupts Base cPCI Interrupt Transparent Mode Assignment SecondaryBase PCI Interrupt System controller modesInternal Arbiter Control Register CC1000dm Request/Grant Local PCI Bus Device Bridge Eeprom I.D. G. .E. .E.E. P. .R.O. MPCI 6254 Configuration Registers Power Management CSR PCI 6254 Configuration Registers38h Reserved Status Vendor Device Subsystem ID hex PCI 6254 Bridge ModePCI Identification Values I. .B.U. S. . C. .O. N. .T.R. O. .L. .S.I.G. N. .A.L. S PCI Bus Control SignalsPCI Bus Control Signals Pin J11 J12 J13 J14 PMC Connector Pin AssignmentsJ13 J14 Pin J11 J12 Pin J11Pin J21 J23 J24 Pin J21 J22Pin J21 J22 J23 J24 Carrier Card BUS Interface Arbitration and Device Selection O. C. .K. .G. E. .N. E. R. .A.T. I.O. .NModel Description Hot SwapHot Swap ImplementationPin Row Z Row a Row B Row C Row D Row E Row F CC1000dm Control SignalsSignal Description Pin Row Z Row a Row B Row C Row D Row E Backplane Connector Pin AssignmentsPin Row a Row B Row C Row D Row E Row F Row FPin Row a Row B Row C Row D Row E Backplane Connector Pin Assignments 10CC1000dm User’s Manual 10004281-02 PrPMC CPCIO s s a r y Index D e Page W. a r t e s y n c p . c o m