INDEX
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
. . .
Numerics
66 MHz enable signal, PCI
A
address signal, PCI
B
basic Hot Swap
block diagram, general system
byte enable signal, PCI
C
caution statements
3.3volt signaling support
circuit board dimensions
clock signal, PCI
bottom
configuration registers, PCI
connectors
J1 pin assignments
J2 pin assignments
J3 pin assignments
J5 pin assignments
contents, table of
D
data buffers
device select signal, PCI
E
equipment for setup
F
features, general
fuses and jumpers overview
G
glossary of acronyms
H
high availability
blue LED
bus isolation circuitry
resources
staged backplane pins
I
IDSEL signal, PCI
J
JTAG header PLD
jumper settings
L
LED, Hot Swap
M
mean time between failures (MTBF)
Monarch functionality
N
O
operating temperature
P
PAR signal, PCI
arbitration
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