Reg. 08 |
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| Reset & Trigger Control |
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Byte |
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| 9 |
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| 8 |
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Bit | 15 |
| 14 | 13 |
| 12 |
| 11 | 10 |
| 9 | 8 | 7 |
| 6 | 5 | 4 |
| 3 | 2 | 1 |
| 0 |
Write | RSTB | RSTA | TLVL |
| TIMP |
| BTBD | BTBM |
| BTAD |
| BTAM | ATBD |
| ATBM | ATAD |
| ATAM | |||||
Read | RSTB | RSTA | TLVL |
| TIMP |
| BTBD | BTBM |
| BTAD |
| BTAM | ATBD |
| ATBM | ATAD |
| ATAM | |||||
| RSTB | | Reset |
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| RSTA | Reset |
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| TLVL | | External Trigger Input Threshold Level (0 = +2.5V, 1 = +1.4V) |
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| TIMP | | External Trigger Input Impedance (0 = high (>100KΩ), 1 = 50Ω) |
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| BTBD | | Module B Trigger B Direction (0 = input, 1 = output) 2 |
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| BTBM | Module B Trigger B Mode |
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| 0 | 0 | Disabled |
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| 0 | 1 | to/from External Trigger |
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10 to/from Module A Trigger A
11 to/from Module A Trigger B
BTAD Module B Trigger A Direction (0 = input, 1 = output) 2 BTAM Module B Trigger A Mode
0 0 Disabled
0 1 to/from External Trigger
| 1 0 | to/from Module A Trigger A |
| 1 1 | to/from Module A Trigger B |
ATBD | Module A Trigger B Direction (0 = input, 1 = output) 2 | |
ATBM | Module A Trigger B Mode | |
| 0 0 | Disabled |
| 0 1 | to/from External Trigger |
| 1 0 | to/from Module B Trigger A |
| 1 1 | to/from Module B Trigger B |
ATAD | Module A Trigger A Direction (0 = input, 1 = output) 2 | |
ATAM | Module A Trigger A Mode | |
| 0 0 | Disabled |
| 0 1 | to/from External Trigger |
| 1 0 | to/from Module B Trigger A |
| 1 1 | to/from Module B Trigger B |
Notes:
1.This bit must be cleared by user software to return the
2.The direction is with respect to the
Reg. 0A |
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| Fan Control & Temperature Status |
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Byte |
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| B |
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| A |
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Bit | 15 |
| 14 | 13 | 12 |
| 11 | 10 | 9 | 8 |
| 7 | 6 |
| 5 | 4 |
| 3 | 2 | 1 | 0 | |
Write | VARF |
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| - | - |
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| Read Only |
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Read | VARF |
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| 0 | 0 |
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| TEMP |
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| VARF | Variable Speed Fan (0 = variable, 1 = full ON) |
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| TEMP |
| Enclosure Temperature (°C = (TEMP – 281) / 4.6) |
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Figure 7. EM405D Registers (continued)
25