Ampro Corporation 5001692A manual Hardware, Overview

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Chapter 3 Hardware

Overview

This chapter discusses the chips and connectors of the module features in the following order:

•CPU (U14)

•Memory

♦SDRAM (U7, U8, U9, U10)

♦Flash Memory (U6)

♦Bytewide socket (U5)

•PC/104 (P1A, B, C, D)

•IDE (J6)

•CompactFlash (J12)

•Serial (J3, J9, J13, J14)

•Floppy/Parallel (J4)

•Utility (J5)

♦Keyboard

♦Mouse

♦Battery

♦Reset Switch

♦Speaker

•Ethernet (J2)

•USB (J10)

•Video (J11)

•Miscellaneous

♦Time of Day/RTC

♦User GPIO (J8)

♦Oops! Jumper (BIOS Recovery)

♦Watchdog timer

•Power (J7)

NOTE	Ampro Computers, Inc. only supports the features/options tested and listed in this
	manual. The main integrated circuits (chips) used in the CoreModule 420 may
	provide more features or options than are listed for the CoreModule 420, but some
	of these features/options are not supported on the module and will not function as
	specified in the chip documentation.

CoreModule 420

Reference Manual

17

Image 23

Contents CoreModule PC/104 Single Board Computer Reference Manual Audience Assumptions Contents Appendix a Table A-1 Reference Manual CoreModule Purpose of this Manual SpecificationsChip Specifications About This ManualOther Ampro Products Related Ampro ProductsCoreModule 420 Support Products Other CoreModule ProductsChapter Reference Manual CoreModule PC/104 Architecture Product OverviewCPU Module FeaturesProduct Description Chapter CRT Bios Block DiagramAtlas Major Integrated Circuits ICsChip Type Mfg Model Description Function StpcIDE Connectors, Jumpers, and LEDsConnector Definitions Jack/Plug # Access DescriptionLED Definitions Jumper # Installed RemovedIndicator Definition Jumper DefinitionsJP6 JP9 JP7 JP8 JP5 JP4 JP1 Dimension SpecificationsPhysical Specifications Mechanical SpecificationsThermal/Cooling Requirements Power SpecificationsEnvironmental Specifications Reference Manual Overview HardwareMemory CPU U14Use Address Size Memory hole size selected Address Map Interrupt Channel AssignmentsEC00-EC0F 0CFC-0CFFPC/104 Bus Interface P1A,B,C,D Pin # Signal Description P1 Row aPin # Signal Description P1 Row B Pin # Signal Description P1 Row C Pin # Signal Description P1 Row D DRQ7 DRQ5DRQ6 Pdrq Pin # Signal DescriptionReset IDE Interface J6IDEPCS1 PiorPdack PirqCompactFlash Socket J12 ACT RDYIordy REGParallel Port Floppy/Parallel Port J4Floppy Disk Drive Port Rdata SlinStep PD3Serial 1 to RS485 Conversion Serial Ports J3, J9, J13, J14Pin # Signal DB9 # Description Usbpp USB Port J10Usbpwr UsbpnUtility Interface J5 RX+ Ethernet Interface J2TX+ Video LCD/CRT Interface J11 FP2 TftdclkTftde TftlpReal Time Clock RTC User Gpio SignalsMiscellaneous Serial Console Oops! Jumper Bios RecoverySerial Console Bios Setup Watchdog TimerPin # Signal Power Interface J7Pin Signal Descriptions Reference Manual CoreModule Introduction Bios SetupAccessing Bios Setup VGA Display Bios Setup Menu Item/Topic Accessing Bios Setup Serial ConsoleBios Setup Opening Screen Main Bios Setup MenuCdrom Bios Configuration ScreenChapter Bios Setup Chapter Bios Setup Chapter Bios Setup USB IRQ none, 1, 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, or Converting the Splash Screen File Splash Screen CustomizationSplash Screen Image Requirements \splashconvert convert.idf Building the Example On-Board Flash Access and UseFlash Programming Requirements Example Assumptions Installing the Example ApplicationFlash Boot API Method Contact Information Appendix a Technical SupportAppendix a 2PH2R44SGA Appendix B Connector Part NumbersTeka GpioAppendix B Index See also Oops! jumper Bios SetupPost 64MB SdramSerial terminal ANSI-compatible Reference Manual CoreModule