Ampro Corporation 5001692A manual Serial Ports J3, J9, J13, J14, Serial 1 to RS485 Conversion

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Chapter 3

Hardware

Serial Ports (J3, J9, J13, J14)

The Atlas CPU and Super I/O chips each contain the circuitry for two of the four serial ports. The Atlas CPU provides serial port 1 (J3) and serial port 2 (J9) through the two independent 10-pin connectors. The Super I/O chip provides serial ports 3 (J13) and 4 (J14. The serial ports support the following features:

Programmable word length, stop bits and parity

16-bit programmable baud rate generator

Interrupt generator

Loop-back mode

16-bit FIFOs for each port

Ports 1 and 2 are supported by the STPC Atlas processor and are 15540 compatible

Serial 1 (J3, COM1) supports RS232/RS485 and has full modem operation

Serial 2 (J9, COM2) supports RS232/RS485 and has full modem operation

Ports 3 and 4 are supported by the Super I/O Controller and are 16550 compatible

Serial 3 (J13, COM3) supports RS232 with full modem support

Serial 4 (J14, COM4) supports RS232 with full modem support

NOTE

The RS232/RS485 mode for Serial Port 1 (COM1) and Serial Port 2

 

(COM2) are selected in BIOS Setup Utility. The RS485 terminations

 

for Serial Port 1 (COM1) and Serial Port 2 (COM2) are selected using

 

jumpers (JP1 and JP2) on the board instead of the BIOS Setup Utility.

 

However, the RS232 mode is the default selection for either

 

Serial Port 1 or 2 (COM1 or COM2).

 

To implement a two-wired RS485 mode with either Serial Port (1 or 2),

 

you must tie pins 3 (RX Data –) to 5 (TX Data –) and pins 4 (Tx Data

 

+) to 6 (Rx Data +) at Serial Port 1 or 2 (J3 or J9) for the two-wire

 

interface. Alternatively, you may short the equivalent pins on the DB9

 

connector attached to respective serial port, as shown in Figure 3-1.

 

 

1 2 3 4 5

Serial Ports (J3, J9)

Or

Standard DB9 Serial

 

 

 

(COM1 or COM2)

Port Connector (Female)

 

 

 

Side View

 

Rear View

7

8

9

 

 

6

Figure 3-1. Serial 1 to RS485 Conversion

CM420RS485jump

Table 3-12 provides the signals for the corresponding pins of the two independent serial interface ports (Serial 1 & 2) and Table 3-13 provides the signals for the corresponding pins of two independent serial interface headers (Serial 3 & 4).

CoreModule 420

Reference Manual

33

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Contents CoreModule PC/104 Single Board Computer Reference Manual Audience Assumptions Contents Appendix a Table A-1 Reference Manual CoreModule Purpose of this Manual SpecificationsChip Specifications About This ManualOther Ampro Products Related Ampro ProductsCoreModule 420 Support Products Other CoreModule ProductsChapter Reference Manual CoreModule PC/104 Architecture Product OverviewModule Features Product DescriptionCPU Chapter CRT Bios Block DiagramAtlas Major Integrated Circuits ICsChip Type Mfg Model Description Function StpcIDE Connectors, Jumpers, and LEDsConnector Definitions Jack/Plug # Access DescriptionLED Definitions Jumper # Installed RemovedIndicator Definition Jumper DefinitionsJP6 JP9 JP7 JP8 JP5 JP4 JP1 Dimension SpecificationsPhysical Specifications Mechanical SpecificationsPower Specifications Environmental SpecificationsThermal/Cooling Requirements Reference Manual Overview HardwareMemory CPU U14Use Address Size Memory hole size selected Address Map Interrupt Channel AssignmentsEC00-EC0F 0CFC-0CFFPC/104 Bus Interface P1A,B,C,D Pin # Signal Description P1 Row aPin # Signal Description P1 Row B Pin # Signal Description P1 Row C Pin # Signal Description P1 Row D DRQ5 DRQ6DRQ7 Pdrq Pin # Signal DescriptionReset IDE Interface J6IDEPCS1 PiorPdack PirqCompactFlash Socket J12 ACT RDYIordy REGFloppy/Parallel Port J4 Floppy Disk Drive PortParallel Port Rdata SlinStep PD3Serial 1 to RS485 Conversion Serial Ports J3, J9, J13, J14Pin # Signal DB9 # Description Usbpp USB Port J10Usbpwr UsbpnUtility Interface J5 Ethernet Interface J2 TX+RX+ Video LCD/CRT Interface J11 FP2 TftdclkTftde TftlpUser Gpio Signals MiscellaneousReal Time Clock RTC Serial Console Oops! Jumper Bios RecoverySerial Console Bios Setup Watchdog TimerPower Interface J7 Pin Signal DescriptionsPin # Signal Reference Manual CoreModule Bios Setup Accessing Bios Setup VGA DisplayIntroduction Bios Setup Menu Item/Topic Accessing Bios Setup Serial ConsoleBios Setup Opening Screen Main Bios Setup MenuCdrom Bios Configuration ScreenChapter Bios Setup Chapter Bios Setup Chapter Bios Setup USB IRQ none, 1, 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, or Splash Screen Customization Splash Screen Image RequirementsConverting the Splash Screen File \splashconvert convert.idf On-Board Flash Access and Use Flash Programming RequirementsBuilding the Example Installing the Example Application Flash Boot APIExample Assumptions Method Contact Information Appendix a Technical SupportAppendix a 2PH2R44SGA Appendix B Connector Part NumbersTeka GpioAppendix B Index See also Oops! jumper Bios SetupPost 64MB SdramSerial terminal ANSI-compatible Reference Manual CoreModule