Ampro Corporation 5001692A manual 0CFC-0CFF, EC00-EC0F

Page 27

Chapter 3

 

Hardware

 

 

 

 

 

Address (hex)

Subsystem

 

 

0040-0043

Programmable Interrupt Timer (Clock/Timer)

 

 

 

 

 

 

0060-0064

Keyboard Controller

 

 

0070-0071

RTC/ NMI enable

 

 

 

 

 

 

0080-008F

DMA Page

 

 

 

 

 

 

0094

Motherboard VGA enable

 

 

 

 

 

 

00A0-00A1

Slave Interrupt Controller (#2)

 

 

 

 

 

 

00C0-00DF

Secondary DMA Controller (#2)

 

 

 

 

 

 

0102

VGA setup register

 

 

 

 

 

 

01F0-01F7

Primary IDE (configurable)

 

 

 

 

 

 

0170-0177

Secondary IDE (configurable)

 

 

 

 

 

 

0201

Watchdog trigger (configurable, disabled by default)

 

 

02E8-02EF

COM4 (configurable)

 

 

 

 

 

 

02F8-02FF

COM2 (configurable)

 

 

 

 

 

 

0376

Secondary IDE (see 170)

 

 

0378-037B

LPT 1 (configurable, disabled by default)

 

 

 

 

 

 

0378-037F

LPT 1 (only in EPP modes)

 

 

 

 

 

 

03B4-03B5

VGA registers (monochrome mode only)

 

 

 

 

 

 

03BA

VGA registers (monochrome mode only)

 

 

 

 

 

 

03C0-03CF

VGA registers

 

 

 

 

 

 

03D4-03D5

VGA registers (color mode only)

 

 

 

 

 

 

03DA

VGA registers (color mode only)

 

 

 

 

 

 

03E8-03EF

COM3 (configurable)

 

 

 

 

 

 

03F0-03F1

Super I/O Configuration

 

 

 

 

 

 

03F0-03F5

Floppy Disk Controller (configurable)

 

 

 

 

 

 

03F6

Primary IDE (see 1F0)

 

 

 

 

 

 

03F7

Floppy Disk Controller (see 3F0)

 

 

 

 

 

 

03F8-03FF

COM1 (configurable)

 

 

 

 

 

 

0778-077A

LPT 1 (only in ECP modes)

 

 

 

 

 

 

0CF8

PCI Configuration Address

 

 

 

 

 

 

0CFC-0CFF

PCI Configuration Data

 

 

 

 

 

 

46E8

VGA add-in mode enable register

 

 

D000-D007

General Purpose I/O for customer use

 

 

 

 

 

 

D400-D407

Board control

 

 

 

 

 

 

E400-E43F

On-Board Ethernet

 

 

E800-E80F

IDE Bus Master registers (PCI mode)

 

 

 

 

 

 

EC00-EC0F

Secondary IDE Control (PCI mode)

 

 

 

 

 

 

F000-F00F

Secondary IDE Command (PCI mode)

 

 

F400-F40F

Primary IDE Control (PCI mode)

 

 

 

 

 

 

F800-F80F

Primary IDE Command (PCI mode)

 

 

 

 

 

Note: Configurable indicates the device’s base address can be configured and/or the device can be disabled, either through BIOS Setup or hardware jumpers.

CoreModule 420

Reference Manual

21

Image 27
Contents CoreModule PC/104 Single Board Computer Reference Manual Audience Assumptions Contents Appendix a Table A-1 Reference Manual CoreModule Purpose of this Manual SpecificationsChip Specifications About This ManualOther Ampro Products Related Ampro ProductsCoreModule 420 Support Products Other CoreModule ProductsChapter Reference Manual CoreModule PC/104 Architecture Product OverviewModule Features Product DescriptionCPU Chapter CRT Bios Block DiagramAtlas Major Integrated Circuits ICsChip Type Mfg Model Description Function StpcIDE Connectors, Jumpers, and LEDsConnector Definitions Jack/Plug # Access DescriptionLED Definitions Jumper # Installed RemovedIndicator Definition Jumper DefinitionsJP6 JP9 JP7 JP8 JP5 JP4 JP1 Dimension SpecificationsPhysical Specifications Mechanical SpecificationsPower Specifications Environmental SpecificationsThermal/Cooling Requirements Reference Manual Overview HardwareMemory CPU U14Use Address Size Memory hole size selected Address Map Interrupt Channel AssignmentsEC00-EC0F 0CFC-0CFFPC/104 Bus Interface P1A,B,C,D Pin # Signal Description P1 Row aPin # Signal Description P1 Row B Pin # Signal Description P1 Row C Pin # Signal Description P1 Row D DRQ5 DRQ6DRQ7 Pdrq Pin # Signal DescriptionReset IDE Interface J6IDEPCS1 PiorPdack PirqCompactFlash Socket J12 ACT RDYIordy REGFloppy/Parallel Port J4 Floppy Disk Drive PortParallel Port Rdata SlinStep PD3Serial 1 to RS485 Conversion Serial Ports J3, J9, J13, J14Pin # Signal DB9 # Description Usbpp USB Port J10Usbpwr UsbpnUtility Interface J5 Ethernet Interface J2 TX+RX+ Video LCD/CRT Interface J11 FP2 TftdclkTftde TftlpUser Gpio Signals MiscellaneousReal Time Clock RTC Serial Console Oops! Jumper Bios RecoverySerial Console Bios Setup Watchdog TimerPower Interface J7 Pin Signal DescriptionsPin # Signal Reference Manual CoreModule Bios Setup Accessing Bios Setup VGA DisplayIntroduction Bios Setup Menu Item/Topic Accessing Bios Setup Serial ConsoleBios Setup Opening Screen Main Bios Setup MenuCdrom Bios Configuration ScreenChapter Bios Setup Chapter Bios Setup Chapter Bios Setup USB IRQ none, 1, 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, or Splash Screen Customization Splash Screen Image RequirementsConverting the Splash Screen File \splashconvert convert.idf On-Board Flash Access and Use Flash Programming RequirementsBuilding the Example Installing the Example Application Flash Boot APIExample Assumptions Method Contact Information Appendix a Technical SupportAppendix a 2PH2R44SGA Appendix B Connector Part NumbersTeka GpioAppendix B Index See also Oops! jumper Bios SetupPost 64MB SdramSerial terminal ANSI-compatible Reference Manual CoreModule