Ampro Corporation 5001692A manual JP6 JP9 JP7 JP8 JP5 JP4 JP1

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Chapter 2					Product Overview
JP6 JP9	JP7	JP8	JP5	JP4	JP1
2				J5	JP1
1
JP6	9	J14	4	2	J3

J9

J11

D8

U12

10

L5

10

JP7

	U3
JP9	JP8
	JP8

3	1
J13	JP5 JP4
U36	U35

12J8J4

					Bytewide
	U7 U8	U9 U10	U6		Socket (U5)
	U11				Pin-1
					Pin-1
U40	U41		U5
			U5
			D1	D2	Link/Activity
					Link/Activity
		U14	U15	J2	LED (D1)
			U15	J2	Speed
	U13				Speed
J10					LED (D2)

U16

				01c
J7	P1	JP2	JP2	CM420RFM_
J7	P1		JP2

Figure 2-5. Jumper and LED Locations (Top View)

Voltage

Regulator

(U19)

	D4	D3			CompactFlash
U19					Socket (J12)
U19		U1
		U1
U37				U21
U20				D5
U20
U22		U24
U23				U42
U23
		J12			F1
		U25	Y3		USB Fuse (F1)
		U25	Y3		Y2
U29	U38 Y1		U27	U28	U30
	PC/104 Bus (P1)				CM420RFM 02a
	PC/104 Bus (P1)

Figure 2-6. Connector Location (Bottom View)

CoreModule 420

Reference Manual

13

Image 19

Contents CoreModule PC/104 Single Board Computer Reference Manual Audience Assumptions Contents Appendix a Table A-1 Reference Manual CoreModule Purpose of this Manual SpecificationsChip Specifications About This ManualOther Ampro Products Related Ampro ProductsCoreModule 420 Support Products Other CoreModule ProductsChapter Reference Manual CoreModule PC/104 Architecture Product OverviewProduct Description Module FeaturesCPU Chapter CRT Bios Block DiagramAtlas Major Integrated Circuits ICsChip Type Mfg Model Description Function StpcIDE Connectors, Jumpers, and LEDsConnector Definitions Jack/Plug # Access DescriptionLED Definitions Jumper # Installed RemovedIndicator Definition Jumper DefinitionsJP6 JP9 JP7 JP8 JP5 JP4 JP1 Dimension SpecificationsPhysical Specifications Mechanical SpecificationsEnvironmental Specifications Power SpecificationsThermal/Cooling Requirements Reference Manual Overview HardwareMemory CPU U14Use Address Size Memory hole size selected Address Map Interrupt Channel AssignmentsEC00-EC0F 0CFC-0CFFPC/104 Bus Interface P1A,B,C,D Pin # Signal Description P1 Row aPin # Signal Description P1 Row B Pin # Signal Description P1 Row C Pin # Signal Description P1 Row D DRQ6 DRQ5DRQ7 Pdrq Pin # Signal DescriptionReset IDE Interface J6IDEPCS1 PiorPdack PirqCompactFlash Socket J12 ACT RDYIordy REGFloppy Disk Drive Port Floppy/Parallel Port J4Parallel Port Rdata SlinStep PD3Serial 1 to RS485 Conversion Serial Ports J3, J9, J13, J14Pin # Signal DB9 # Description Usbpp USB Port J10Usbpwr UsbpnUtility Interface J5 TX+ Ethernet Interface J2RX+ Video LCD/CRT Interface J11 FP2 TftdclkTftde TftlpMiscellaneous User Gpio SignalsReal Time Clock RTC Serial Console Oops! Jumper Bios RecoverySerial Console Bios Setup Watchdog TimerPin Signal Descriptions Power Interface J7Pin # Signal Reference Manual CoreModule Accessing Bios Setup VGA Display Bios SetupIntroduction Bios Setup Menu Item/Topic Accessing Bios Setup Serial ConsoleBios Setup Opening Screen Main Bios Setup MenuCdrom Bios Configuration ScreenChapter Bios Setup Chapter Bios Setup Chapter Bios Setup USB IRQ none, 1, 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, or Splash Screen Image Requirements Splash Screen CustomizationConverting the Splash Screen File \splashconvert convert.idf Flash Programming Requirements On-Board Flash Access and UseBuilding the Example Flash Boot API Installing the Example ApplicationExample Assumptions Method Contact Information Appendix a Technical SupportAppendix a 2PH2R44SGA Appendix B Connector Part NumbersTeka GpioAppendix B Index See also Oops! jumper Bios SetupPost 64MB SdramSerial terminal ANSI-compatible Reference Manual CoreModule