Ampro Corporation 5001692A manual Power Interface J7, Pin Signal Descriptions, Pin # Signal

Page 49

Chapter 3

Hardware

Watchdog Code examples – Ampro has provided source code examples on the CoreModule 420 Doc & SW CD-ROM illustrating how to control the WDT. The code examples can be easily copied to your development environment to compile and test the examples, or make any desired changes before compiling. Refer to the WDT Readme file in the Miscellaneous Source Code Examples subdirectory, under the Support Software menu on the CoreModule 420 Doc & SW CD-ROM.

Power Interface (J7)

The CoreModule 420 requires one +5 volt power source and uses a 10-pin header with 0.1” spacing. When the +5 power drops below ~4.0V, a low voltage reset triggers activating a system interrupt.

The power input connector (J7) supplies the following voltage directly to the module:

5.0VDC +/- 5% @ 1.35 Amps

Table 3-19 gives the signals for Power supply pin outs.

Table 3-19. Power Interface Pins/Signals (J7)

Pin

Signal

Descriptions

1

GND

Ground

2

+5V

+5 Volts

3

Key/GND

Key Pin on connector/Grounded on board

4

+12V

+12 volts routed to PC/104

5

GND

Ground

6

NC

Not connected

7

GND

Ground

8

+5V

+5 Volts

9

GND

Ground

10

+5V

+5 Volts

Note: The shaded area denotes power or ground.

Table 3-20. Power Interface Pin Arrangement (J7)

Pin #

Signal

Pin #

Signal

1

GND

2

+5V

3

GND

4

+12V

5

GND

6

Key/NC

7

GND

8

+5V

9

GND

10

+5V

 

 

 

 

Note: The shaded area denotes power or ground.

CoreModule 420

Reference Manual

43

Image 49
Contents CoreModule PC/104 Single Board Computer Reference Manual Audience Assumptions Contents Appendix a Table A-1 Reference Manual CoreModule Chip Specifications SpecificationsAbout This Manual Purpose of this ManualCoreModule 420 Support Products Related Ampro ProductsOther CoreModule Products Other Ampro ProductsChapter Reference Manual CoreModule PC/104 Architecture Product OverviewProduct Description Module FeaturesCPU Chapter CRT Bios Block DiagramChip Type Mfg Model Description Function Major Integrated Circuits ICsStpc AtlasConnector Definitions Connectors, Jumpers, and LEDsJack/Plug # Access Description IDEIndicator Definition Jumper # Installed RemovedJumper Definitions LED DefinitionsJP6 JP9 JP7 JP8 JP5 JP4 JP1 Physical Specifications SpecificationsMechanical Specifications DimensionEnvironmental Specifications Power SpecificationsThermal/Cooling Requirements Reference Manual Overview HardwareMemory CPU U14Use Address Size Memory hole size selected Address Map Interrupt Channel AssignmentsEC00-EC0F 0CFC-0CFFPC/104 Bus Interface P1A,B,C,D Pin # Signal Description P1 Row aPin # Signal Description P1 Row B Pin # Signal Description P1 Row C Pin # Signal Description P1 Row D DRQ6 DRQ5DRQ7 Reset Pin # Signal DescriptionIDE Interface J6 PdrqPdack PiorPirq IDEPCS1CompactFlash Socket J12 Iordy RDYREG ACTFloppy Disk Drive Port Floppy/Parallel Port J4Parallel Port Step SlinPD3 RdataSerial 1 to RS485 Conversion Serial Ports J3, J9, J13, J14Pin # Signal DB9 # Description Usbpwr USB Port J10Usbpn UsbppUtility Interface J5 TX+ Ethernet Interface J2RX+ Video LCD/CRT Interface J11 Tftde TftdclkTftlp FP2Miscellaneous User Gpio SignalsReal Time Clock RTC Serial Console Oops! Jumper Bios RecoverySerial Console Bios Setup Watchdog TimerPin Signal Descriptions Power Interface J7Pin # Signal Reference Manual CoreModule Accessing Bios Setup VGA Display Bios SetupIntroduction Bios Setup Menu Item/Topic Accessing Bios Setup Serial ConsoleBios Setup Opening Screen Main Bios Setup MenuCdrom Bios Configuration ScreenChapter Bios Setup Chapter Bios Setup Chapter Bios Setup USB IRQ none, 1, 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, or Splash Screen Image Requirements Splash Screen CustomizationConverting the Splash Screen File \splashconvert convert.idf Flash Programming Requirements On-Board Flash Access and UseBuilding the Example Flash Boot API Installing the Example ApplicationExample Assumptions Method Contact Information Appendix a Technical SupportAppendix a Teka Appendix B Connector Part NumbersGpio 2PH2R44SGAAppendix B Index See also Oops! jumper Bios SetupPost 64MB SdramSerial terminal ANSI-compatible Reference Manual CoreModule