Texas Instruments TMS320 DSP manual Algorithms

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Algorithms

Element

struct XYZ_Obj

XYZ_Handle

XYZ_Params

XYZ_PARAMS

XYZ_create()

XYZ_delete()

Description

Module'sobject definition; normally not defined in the module'sheader.

Handle to an instance object; synonym for struct XYZ_Obj *

Structure type of all module object creation parameters

Constant structure of all default object creation parameters

Run-time creation and initialization of a module'sobject

Run-time deletion of a module'sobject

Required

yes

yes

yes

yes

no no

3.2Algorithms

eXpressDSP-compliant algorithms are modules that implement the abstract interface IALG. By this, we mean that the module must declare and initialize a structure of type IALG_Fxns, the structure must have global scope, and its name must be XYZ_IALG, where XYZ is the unique module-vendor prefix described above. The IALG interface allows algorithms to define their memory resource requirements and thereby enable the efficient use of on-chip data memories by client applications. The IALG interface is described in detail in Chapter 1 of the TMS320 DSP Algorithm Standard API Reference (SPRU360).

Not every mathematical function should be cast as an eXpressDSP-compliant algorithm. In particular, many "traditional" math library operations such as FFT or dot product, which do not maintain state between consecutive operations and do not require internal workspaces to perform their computation, are not good eXpressDSP-compliant candidates. These algorithms encapsulate larger computations that require internal working memory and typically operate on (conceptually) infinite data streams.

Figure 3-4. Example Implementation of IALG Interface

IALG

IALG_Fxns

Implements

FIR

FIR_Config FIR;

FIR_init();

FIR_exit();

FIR_Fxcs FIR_IALG;

The IALG interface defines a "protocol" between the client and the algorithm used to create an algorithm instance object at run-time. The IALG interface is designed to enable clients to use the algorithm in virtually any execution environment; i.e., preemptive and non-preemptive, static and dynamic systems. Thus, it is important that eXpressDSP-compliant algorithms never use any memory allocation routines (including those provided in the standard C run-time support libraries). All memory allocation must be performed by the client.

Rule 12

All algorithms must implement the IALG interface.

Since all eXpressDSP-compliant algorithm implementations are modules that support object creation and all such modules should support design-time object creation, all eXpressDSP-compliant algorithms support both run-time and design-time creation of algorithm objects. In order to ensure support for design-time object creation, it is important that all methods defined by the IALG interface be independently relocatable.

SPRU352G –June 2005 –Revised February 2007

Algorithm Component Model

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Contents Rules and Guidelines Users GuideSubmit Documentation Feedback Contents Use of the DMA Resource Urls List of Figures Read This First Intended AudienceDocument Overview Text Conventions Related DocumentationRule n Guideline nOverview Rules for TMS320C5x Rules for TMS320C6x Scope of the StandardRequirements of the Standard Rules and GuidelinesIntentional Omissions Goals of the StandardFrameworks System ArchitectureCore Run-Time Support AlgorithmsGeneral Programming Guidelines Threads and Reentrancy Use of C LanguageThreads RuleReentrancy Preemptive vs. Non-Preemptive MultitaskingExample Data Memory Data MemoryScratch versus Persistent Memory SpacesScratch vs Persistent Memory Allocation Guideline Algorithm versus ApplicationProgram Memory ROM-abilitySection Name Purpose Use of Peripherals Use of PeripheralsInterfaces and Modules Algorithms Packaging Algorithm Component ModelImplementation Fir.h Interfaces and ModulesExternal Identifiers Naming Conventions Module Initialization and FinalizationModule Instance Objects Run-Time Object Creation and Deletion Design-Time Object CreationExample Module Module ConfigurationMultiple Interface Support Summary Interface InheritanceElement Description RequiredAlgorithms AlgorithmsObject Code PackagingDebug Verses Release Header FilesModuleversvendorvariant.1arch Data Memory Program Memory Interrupt Latency Execution Time Algorithm Performance CharacterizationHeap Memory ExternalSize Static Local and Global Data Memory Stack MemoryData Bss Object files Size Execution Time Interrupt LatencyMips Is Not Enough OperationExecution Timeline for Two Periodic Tasks Execution Time ModelProcess 19800059000 198000 Submit Documentation Feedback DSP-Specific Guidelines Register Types CPU Register TypesTMS320C6xxx Rules and Guidelines Use of Floating PointEndian Byte Ordering Data ModelsStatus Register Register ConventionsRegister Use Type CSR Field Use TypeInterrupt Latency TMS320C54xx Rules and GuidelinesProgram Models TMS320C54xx Rules and Guidelines Status Registers ST0 Field Name Use TypeST1 Field Name Use Type TMS320C55x Rules and Guidelines Stack ArchitecturePmst Field Name Use Type Example RelocatabilitySSP Status Bits ST2 Field Name Use TypeST3 Field Name Use Type Homy General TMS320C24xx GuidelinesTMS320C28x Rules and Guidelines TMS320C28x Rules and GuidelinesXAR0 M0M1MAP Submitting DMA Transfer Requests Use of the DMA ResourceAlgorithm and Framework OverviewLogical Channel Requirements for the Use of the DMA ResourceData Transfer Synchronization Data Transfer PropertiesAbstract Interface DMA GuidelineDMA Rule Resource Characterization Data Transfers bytes FrequencyAverage Maximum Strong Ordering of DMA Transfer Requests Runtime APIsDevice Independent DMA Optimization Guideline Submitting DMA Transfer Requests13 C6xxx Specific DMA Rules and Guidelines Cache Coherency Issues for Algorithm Producers14 C55x Specific DMA Rules and Guidelines Supporting Packed/Burst Mode DMA TransfersAddressing Automatic Endianism Conversion Issues Minimizing Logical Channel Reconfiguration OverheadInter-Algorithm Synchronization Non-Preemptive SystemPreemptive System Algorithm B Algorithm a Inter-Algorithm Synchronization Appendix a General Rules DMA Rules Performance Characterization RulesGeneral Guidelines DMA Guidelines Submit Documentation Feedback Core Run-Time APIs DSP/BIOS Run-time Support LibraryTI C-Language Run-Time Support Library DSP/BIOS Run-time Support LibraryBooks BibliographySubmit Documentation Feedback Glossary of Terms GlossaryGlossary of Terms Glossary of Terms Important Notice