Texas Instruments TMS320 DSP manual Header Files, Debug Verses Release

Page 35

www.ti.com

 

Packaging

<module>

is the name of the module (containing characters from the set [a-z0-9]),

<vers>

is an optional version number of the form v<num> where num consists of

 

characters from the set [0-9],

<vendor>

is the name of the vendor (containing characters from the set [a-z0-9]),

<arch>

is an identifier indicating the DSP architecture (from the set 24, 281, 54, 54f, 54m,

 

55l, 62, 62e, 64, 64e, 67, 67e) These identifiers have the following meanings:

 

∙ 24 - TMS320C2400 object files

 

∙ 281 - TMS320C2800 large model object files

 

∙ 54 - TMS320C5400 near call/return object files

 

∙ 54f - TMS320C5400 far call/return object files

 

∙ 54m - TMS320C5400 mixed call/return object files

 

∙ 55l - TMS320C5500 large model object files

 

∙ 62 - TMS320C6200 little endian object files

 

∙ 62e - TMS320C6200 big endian object files

 

∙ 64 - TMS320C6400 little endian object files

 

∙ 64e - TMS320C6400 big endian object files

 

∙ 67 - TMS320C6700 little endian object files

 

∙ 67e - TMS320C6700 big endian object files

3.3.2 Header Files

Rule 16

Each eXpressDSP-compliant algorithm header must follow a uniform naming convention.

In addition to the object Code implementation of the algorithm, each eXpressDSP-compliant module includes one or more interface headers. In order to ensure that no name conflicts occur, we must adopt a naming convention for all header files. C language headers should be named as follows:

<module><vers>_<vendor>.h

Assembly language headers should be named as follows:

<module><vers>_<vendor>.h<arch>

3.3.3 Debug Verses Release

A single vendor may produce more than one implementation of an algorithm. For example, a "debug" version may include function parameter checking that incurs undesirable overhead in a "release" version. A vendor may even decide to provide multiple debug or release versions of a single algorithm. Also, each version may make different tradeoffs between time and space overhead.

In order to easily manage the common case of debug and release versions of the same algorithm within a TMS320 DSP Algorithm Standard development environment, it is important to adopt a naming convention that makes it easy to ensure that a eXpressDSP-compliant application is built from a uniform set of components. For example, it should be easy to ensure that an application is built entirely from release versions of eXpressDSP-compliant components.

Rule 17

Different versions of a eXpressDSP-compliant algorithm from the same vendor must follow a uniform naming convention.

SPRU352G –June 2005 –Revised February 2007

Algorithm Component Model

35

Page 34 Page 36
Image 35
Page 34 Page 36
Contents Rules and Guidelines Users GuideSubmit Documentation Feedback Contents Use of the DMA Resource Urls List of Figures Document Overview Read This FirstIntended Audience Guideline n Related DocumentationText Conventions Rule nOverview Rules for TMS320C5x Rules for TMS320C6x Scope of the StandardRequirements of the Standard Rules and GuidelinesIntentional Omissions Goals of the StandardFrameworks System ArchitectureCore Run-Time Support AlgorithmsGeneral Programming Guidelines Rule Use of C LanguageThreads and Reentrancy ThreadsReentrancy Preemptive vs. Non-Preemptive MultitaskingExample Data Memory Data MemoryScratch versus Persistent Memory SpacesScratch vs Persistent Memory Allocation Guideline Algorithm versus ApplicationSection Name Purpose Program MemoryROM-ability Use of Peripherals Use of PeripheralsInterfaces and Modules Algorithms Packaging Algorithm Component ModelImplementation Fir.h Interfaces and ModulesExternal Identifiers Module Instance Objects Naming ConventionsModule Initialization and Finalization Run-Time Object Creation and Deletion Design-Time Object CreationExample Module Module ConfigurationMultiple Interface Support Description Required Interface Inheritance Summary ElementAlgorithms AlgorithmsObject Code PackagingDebug Verses Release Header FilesModuleversvendorvariant.1arch Data Memory Program Memory Interrupt Latency Execution Time Algorithm Performance CharacterizationSize Heap MemoryExternal Static Local and Global Data Memory Stack MemoryData Bss Object files Size Operation Interrupt LatencyExecution Time Mips Is Not EnoughExecution Timeline for Two Periodic Tasks Execution Time Model59000 198000 Process198000 Submit Documentation Feedback DSP-Specific Guidelines Register Types CPU Register TypesData Models Use of Floating PointTMS320C6xxx Rules and Guidelines Endian Byte OrderingCSR Field Use Type Register ConventionsStatus Register Register Use TypeProgram Models Interrupt LatencyTMS320C54xx Rules and Guidelines TMS320C54xx Rules and Guidelines ST1 Field Name Use Type Status RegistersST0 Field Name Use Type Pmst Field Name Use Type TMS320C55x Rules and GuidelinesStack Architecture Example RelocatabilitySSP ST3 Field Name Use Type Status BitsST2 Field Name Use Type Homy General TMS320C24xx GuidelinesTMS320C28x Rules and Guidelines TMS320C28x Rules and GuidelinesXAR0 M0M1MAP Submitting DMA Transfer Requests Use of the DMA ResourceAlgorithm and Framework OverviewLogical Channel Requirements for the Use of the DMA ResourceData Transfer Synchronization Data Transfer PropertiesDMA Rule Abstract InterfaceDMA Guideline Average Maximum Resource CharacterizationData Transfers bytes Frequency Strong Ordering of DMA Transfer Requests Runtime APIsDevice Independent DMA Optimization Guideline Submitting DMA Transfer Requests13 C6xxx Specific DMA Rules and Guidelines Cache Coherency Issues for Algorithm Producers14 C55x Specific DMA Rules and Guidelines Supporting Packed/Burst Mode DMA TransfersNon-Preemptive System Minimizing Logical Channel Reconfiguration OverheadAddressing Automatic Endianism Conversion Issues Inter-Algorithm SynchronizationPreemptive System Algorithm B Algorithm a Inter-Algorithm Synchronization Appendix a General Rules DMA Rules Performance Characterization RulesGeneral Guidelines DMA Guidelines Submit Documentation Feedback Core Run-Time APIs DSP/BIOS Run-time Support LibraryTI C-Language Run-Time Support Library DSP/BIOS Run-time Support LibraryBooks BibliographySubmit Documentation Feedback Glossary of Terms GlossaryGlossary of Terms Glossary of Terms Important Notice
Top Page Image Contents