Texas Instruments TMS320 DSP manual TI C-Language Run-Time Support Library

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TI C-Language Run-Time Support Library

Recall that only a subset of the DSP/BIOS and the TI C run-time support library functions are allowed to be referenced from an eXpressDSP-compliant algorithm.

B.1 TI C-Language Run-Time Support Library

In the future, this list of allowable APIs will grow to include a rich set of DSP math function calls; e.g., functions for computing a DCT, FFT, dot product, etc.

The following table summarizes the TI C-Language Run-time Support Library functions that may be referenced by eXpressDSP-compliant algorithms.

Allowed or
Disallowed	Category	Typical Functions in Category
allowed	String functions	strcpy, strchr, etc
allowed	Memory-moving functions	memcpy, memmove, memset, etc.
allowed	Integer math support	_divi, _divu, _remi, _remu, etc.
allowed	Floating point support	_addf, _subf, _mpyf, _divf, _addd, _subd, _mpyd, _divd,
		log10, cosh, etc.
allowed	Conversion functions	atoi, ftoi, itof, etc.
disallowed	Heap management functions	malloc, free, realloc, alloc, …
disallowed	I/O functions	printf, open, read, write, etc
disallowed	misc. non-reentrant functions	printf, sprintf, ctime, etc.

Notes

(1)

(2)

(2)

(2)(3)

(2)

(4)

(5)

(4)(6)

(1)Exceptions: strtok is not reentrant, and strdup allocates memory with malloc.

(2)Some of these are issued by the compiler automatically for certain C operators.

(3)The errno paradigm is not reentrant. Thus, errno must not be used by eXpressDSP-compliant algorithms.

(4)Algorithms must not allocate memory.

(5)Algorithms are not allowed to perform I/O.

(6)Algorithms must be reentrant and must, therefore, only reference reentrant functions.

B.2 DSP/BIOS Run-time Support Library

The HWI module'sHWI disable, HWI enable, and HWI restore are the only allowed DSP/BIOS functions. These operations can be used to create critical sections within an algorithm and provide a processor-independent way of controlling preemption when used in a DSP/BIOS framework.

82

Core Run-Time APIs

SPRU352G –June 2005 –Revised February 2007

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Contents Users Guide Rules and GuidelinesSubmit Documentation Feedback Contents Use of the DMA Resource Urls List of Figures Intended Audience Read This FirstDocument Overview Rule n Related DocumentationText Conventions Guideline nOverview Scope of the Standard Rules for TMS320C5x Rules for TMS320C6xRules and Guidelines Requirements of the StandardGoals of the Standard Intentional OmissionsSystem Architecture FrameworksAlgorithms Core Run-Time SupportGeneral Programming Guidelines Threads Use of C LanguageThreads and Reentrancy RulePreemptive vs. Non-Preemptive Multitasking ReentrancyExample Data Memory Data MemoryMemory Spaces Scratch versus PersistentScratch vs Persistent Memory Allocation Algorithm versus Application GuidelineROM-ability Program MemorySection Name Purpose Use of Peripherals Use of PeripheralsAlgorithm Component Model Interfaces and Modules Algorithms PackagingInterfaces and Modules Implementation Fir.hExternal Identifiers Module Initialization and Finalization Naming ConventionsModule Instance Objects Design-Time Object Creation Run-Time Object Creation and DeletionModule Configuration Example ModuleMultiple Interface Support Element Interface InheritanceSummary Description RequiredAlgorithms AlgorithmsPackaging Object CodeHeader Files Debug Verses ReleaseModuleversvendorvariant.1arch Algorithm Performance Characterization Data Memory Program Memory Interrupt Latency Execution TimeExternal Heap MemorySize Stack Memory Static Local and Global Data MemoryData Bss Object files Size Mips Is Not Enough Interrupt LatencyExecution Time OperationExecution Time Model Execution Timeline for Two Periodic Tasks198000 Process59000 198000 Submit Documentation Feedback DSP-Specific Guidelines CPU Register Types Register TypesEndian Byte Ordering Use of Floating PointTMS320C6xxx Rules and Guidelines Data ModelsRegister Use Type Register ConventionsStatus Register CSR Field Use TypeTMS320C54xx Rules and Guidelines Interrupt LatencyProgram Models TMS320C54xx Rules and Guidelines ST0 Field Name Use Type Status RegistersST1 Field Name Use Type Stack Architecture TMS320C55x Rules and GuidelinesPmst Field Name Use Type Relocatability ExampleSSP ST2 Field Name Use Type Status BitsST3 Field Name Use Type Homy TMS320C24xx Guidelines GeneralTMS320C28x Rules and Guidelines TMS320C28x Rules and GuidelinesXAR0 M0M1MAP Use of the DMA Resource Submitting DMA Transfer RequestsOverview Algorithm and FrameworkRequirements for the Use of the DMA Resource Logical ChannelData Transfer Properties Data Transfer SynchronizationDMA Guideline Abstract InterfaceDMA Rule Data Transfers bytes Frequency Resource CharacterizationAverage Maximum Runtime APIs Strong Ordering of DMA Transfer RequestsSubmitting DMA Transfer Requests Device Independent DMA Optimization GuidelineCache Coherency Issues for Algorithm Producers 13 C6xxx Specific DMA Rules and GuidelinesSupporting Packed/Burst Mode DMA Transfers 14 C55x Specific DMA Rules and GuidelinesInter-Algorithm Synchronization Minimizing Logical Channel Reconfiguration OverheadAddressing Automatic Endianism Conversion Issues Non-Preemptive SystemPreemptive System Algorithm B Algorithm a Inter-Algorithm Synchronization Appendix a General Rules Performance Characterization Rules DMA RulesGeneral Guidelines DMA Guidelines Submit Documentation Feedback DSP/BIOS Run-time Support Library Core Run-Time APIsDSP/BIOS Run-time Support Library TI C-Language Run-Time Support LibraryBibliography BooksSubmit Documentation Feedback Glossary Glossary of TermsGlossary of Terms Glossary of Terms Important Notice