SUPER MICRO Computer 6113L-8, 6113L-i user manual Register for date and time next

Page 90

SUPERSERVER 6113L-8/6113L-i User's Manual

Checkpoint

Code Description

03h

The NMI is disabled. Next, checking for a soft reset or a power on

 

condition.

05h

The BIOS stack has been built. Next, disabling cache memory.

06h

Uncompressing the POST code next.

07h

Next, initializing the CPU and the CPU data area.

08h

The CMOS checksum calculation is done next.

0Ah

The CMOS checksum calculation is done. Initializing the CMOS status

 

register for date and time next.

0Bh

The CMOS status register is initialized. Next, performing any required

 

initialization before the keyboard BAT command is issued.

0Ch

The keyboard controller input buffer is free. Next, issuing the BAT

 

command to the keyboard controller.

0Eh

The keyboard controller BAT command result has been verified.

 

Next, performing any necessary initialization after the keyboard

 

controller BAT command test.

0Fh

The initialization after the keyboard controller BAT command test is

 

done. The keyboard command byte is written next.

10h

The keyboard controller command byte is written. Next, issuing the

 

Pin 23 and 24 blocking and unblocking command.

11h

Next, checking if <End or <Ins> keys were pressed during power on.

 

Initializing CMOS RAM if the Initialize CMOS RAM in every boot

 

AMIBIOS POST option was set in AMIBCP or the <End> key was

 

pressed.

12h

Next, disabling DMA controllers 1 and 2 and interrupt controllers 1 and

 

2.

13h

The video display has been disabled. Port B has been initialized. Next,

 

initializing the chipset.

14h

The 8254 timer test will begin next.

19h

The 8254 timer test is over. Starting the memory refresh test next.

1Ah

The memory refresh line is toggling. Checking the 15 second on/off

 

time next.

2Bh

Passing control to the video ROM to perform any required configu-

 

ration before the video ROM test.

2Ch

All necessary processing before passing control to the video ROM

 

is done. Looking for the video ROM next and passing control to it.

2Dh

The video ROM has returned control to BIOS POST. Performing any

 

required processing after the video ROM had control.

23h

Reading the 8042 input port and disabling the MEGAKEY Green

 

PC feature next. Making the BIOS code segment writable and

performing any necessary configuration before initializing the interrupt vectors.

B-2

Image 90
Contents Super Page Preface About This ManualManual Organization Advanced Serverboard Setup Advanced Chassis SetupBios Preface Table of Contents System Safety Advanced Serverboard SetupAdvanced Chassis Setup BiosAppendix a Bios Error Beep Codes AppendicesPage Chapter Introduction OverviewServerboard Features ChipsetATI Graphics Controller Processors MemoryPCI Expansion Slots Onboard Controllers/PortsOther Features E8870 Chipset Block DiagramControl Panel Server Chassis FeaturesSystem Power BackplaneCooling System Europe Contacting SupermicroHeadquarters Asia-PacificPage Chapter Server Installation Preparing for SetupUnpacking the SuperServer 6113L-8/6113L-i Choosing a Setup Location Rack PrecautionsServer Precautions Installing the Server into a Rack Installing the Outer RailsIdentifying the Sections of the Rack Rails Installing the Server into the Rack Installing the Rack RailsInstalling the Server into a Rack Front bezel is optional Installing the Server into a Telco Rack Checking the Serverboard Setup Page Checking the Drive Bay Setup Page Chapter System Interface Control Panel ButtonsControl Panel LEDs Scsi Drive Carrier LEDs 6113L-8 only Page Chapter System Safety Electrical Safety PrecautionsGeneral Safety Precautions ESD Precautions Operating Precautions Handling the i2DML-8G2/i2DML-iG2 Serverboard Chapter Advanced Serverboard SetupPrecautions UnpackingItanium2 Processor and Heatsink Installation Locating the ComponentsInstalling the Heatsink Retention Mechanism Installing Heatsink Retention MechanismInstalling Itanium2 CPUs PointerPower pod slot Installing the Power PodsCPU power pod Pins of the CPU are notDual Itanium2 CPUs with Power Pods Installed Installing Heatsinks for CPUs without heatsinks Connecting AC Power CPUs 2 with Heatsinks InstalledConnecting Cables Connecting Data CablesConnecting Power Cables Connecting the Control Panel Front Control Panel Header Pins U66Installing Memory Dimm Installation See FigureI/O Ports 6a. Side View of Dimm Installation into Socket Memory SupportPCI card installation Adding PCI CardsPCI-X slot Serverboard Details Super i2DML-8G2Jumper Description Default Setting Connector DescriptionI2DML-8G2/i2DML-iG2 Quick Reference Connector Definitions HDD LED Overheat LED OHReset Button Power ButtonUniversal Serial Bus USB0/1 Glan Ethernet Ports Front Panel Universal Serial Bus HeaderSerial Ports Chassis IntrusionPower Fault Fan HeadersWake-On-Ring SMB Power I2C Connector SMBExplanation Jumpers Jumper SettingsVGA Enable/Disable Cmos ClearGlan Enable/Disable Watch Dog Enable/DisablePower Fail Alarm Enable/ Disable Glan LEDs Onboard IndicatorsScsi Enable/Disable 6113L-8 only Debug LEDsIDE Connectors Scsi and IDE Disk Drive ConnectionsScsi Activity LED 6113L-8 only Ultra320 Scsi Connectors 6113L-8 only Pin Ultra 320 Scsi Connectors J3 and J18Chapter Advanced Chassis Setup Static-Sensitive DevicesTools Required Control Panel Chassis Front and Rear ViewsSystem Fans System Fan FailureReplacing System Fans Drive Bay Installation/Removal Removing the Front BezelAccessing the Drive Bays Removing the Front BezelSCSI/IDE Drive Installation Mounting a SCSI/IDE drive in a drive carrierInstalling/removing hot-swap Scsi drives 6113L-8 only CD-ROM Drive Installation Removing/Replacing the Power Supply Power SupplyPower Supply Failure Removing the power supplyRemoving/Replacing the Power Supply Chapter IntroductionBSP Information Main Setup ScreenLanguage Menu System Time/System DateAdvanced Setup Screen Super IO ConfigurationIDE Configuration Serial Port1 Address/Serial Port2 AddressType LBA/Large ModePrimary IDE Master/Slave, Secondary IDE Master/Slave Block Multi-Sector TransferBit Data Transfer DMA ModeA.R.T. For Hard disk drives Armd Emulation TypeBios Settings Configuration Quiet BootAtapi 80-Pin Cable Detection System Health Monitor Watch Dog Timer Peripheral Device ConfigurationPower Loss Control Watch Dog Timer ValueUSB Configuration USB FunctionLegacy USB Support Allocate IRQ to PCI VGA PCI/PnP ConfigurationPCI Latency Timer PCI IDE BusMasterChange Supervisor Password Security SettingsOverheat Temperature Trips Hardware Health Monitoring Health FunctionExit Options Change User PasswordClear User Password Exit Saving ChangesLoad Optimal Defaults Load Fail-Safe DefaultsDiscard Changes Appendix a Bios Error Beep Codes IA-32 Error Beep CodesBeep Code Error Message Description IA-64 Common Debug Codes Checkpoints Code DescriptionAppendix B Bios Post Codes Checkpoint Code DescriptionRegister for date and time next Monochrome mode and color mode settings next 47h 60h 95h Appendix C Software Installation Introduction to the EFI PlatformAmibios Flash Page Page Page Adding the CD-ROM Boot Option in EFI IA64 OS Installation Page Appendix D System Specifications System Cooling WeightPower Supply System Input Requirements