Omega 308, DAQP-208, 208H user manual Select channel 0, gain 2, 1st entry

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5.2.2.1 Scan List Queue Programming

The scan list queue must be programmed when the A/D circuit card is idle. Each queue entry contains two bytes as described above and the integrity of the entry must be guaranteed. (The scan list queue is write only). The queue should be flushed before writing into it. Refer to the Auxiliary Control Register section for information on scan list queue reset. The first entry of the queue should have bit 7 (LSB) set to “1” as the first channel mark. For the remaining entries, set the bit to “0”. The synchronous sample hold bit (LSB) is not used by DAQP card and is reserved for expansion cards that support synchronous sample hold.

Example 1

Table 5-10 lists the required queue entries to specify a scan list of three single-ended internal channels: 0, 12, and 7; with a gain of 2 for channel 0 and a gain of 4 for channels 12 and 7:

Table 5-10. Scan List Queue Programming Example 1

 

Entry

Binary

Hex

Explanation

 

 

 

 

 

 

 

 

 

 

1

0001 0000 1000 0000

1080

Select channel 0, gain 2, 1st entry

 

 

 

2

0010 1100 0000 0000

2C00

entry

 

 

 

Select channel 12, gain 4

 

 

3

0010 0111 0000 0000

2700

Select channel 7, gain 4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Example 2

Table 5-10 lists the required queue entries to specify a scan list of 4 differential internal channels: 2, 1, 6 and 7; with gain of 1 for all channels:

Table 5-11. Scan List Queue Programming Example 2

 

Entry

Binary

Hex

Explanation

 

 

 

 

 

 

 

 

 

 

1

0100 0010 1000 0000

4280

Select channel 2, gain 1, 1st entry

 

 

 

 

 

 

 

 

 

2

0100 0001 0000 0000

4100

Select channel 1, gain 1

 

 

 

 

 

 

 

 

 

3

0100 0110 0000 0000

4600

Select channel 6, gain 1

 

 

 

 

 

 

 

 

 

4

0100 0111 0000 0000

4700

Select channel 7, gain 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DAQP-208/208H/308 Users Manual

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Contents DAQP-208/208H/308 Type II Pcmcia Data Acquisition Adapter sWARRANTY/DISCLAIMER Servicing Europe Servicing North AmericaFor immediate technical or application assistance Page Page Table of Contents Page Daqp Series Card Output Connector List of Figures and TablesIntroduction Hardware Configuration and Initial Setup Page Software Installation Windows NT Page Data Acquisition Software and Drivers DAQPACL.SYS DAQPAEN.EXE Page Device = C\DAQPACL.SYS Device = C\DAQPACL.SYS b300,i5 Page Page Page Device = C\DAQPAEN.EXE S0,r Field Wiring GND DA0 DA1CP-DAQPA Cable Assembly GNDDaqp Series Card Cable Mapping UIO-37 Screw Terminal Block UIO-37 Terminal BlockDC/DC Power Supply Theory of OperationAnalog Input Multiplexer Programmable Gain Control AmplifierScan List Register Trigger Circuit A/D Converter and Data Fifo Interrupt and Status Digital I/OA/D State Machine FifoTimer/Counter 10 D/A CircuitPage O Registers Pcmcia InterfaceSreset Address Map Bit Page Data Fifo Threshold Setting LSB 1080 Select channel 0, gain 2, 1st entry Page Page Page Page Digital input bit External gain select, high bit All Output Flush scan list command High byte of the almost full threshold 15 2K option 18. D/A Data Port Bit Definition Bits Explanation 15-13 19. D/A Update Modes 20. Timer/Counter Modes Page Page Page Specifications TTL DAQP-208/208H/308 Version April 12
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