4.5 Trigger Circuit
The DAQP card can be triggered by software, an external TTL signal, the analog input passing through the preset threshold or the pacer clock. For the TTL or analog trigger, an active trigger edge can be selected for either the low-to-high or high-to-low transition.
In one-shot trigger mode, one trigger (either internal or external), will start one and only one scan of all channels specified in the scan list. (The pacer clock has no effect in this mode although it is good practice to program the pacer clock with a divisor greater than 2). Multiple scans can be initiated by issuing multiple triggers.
In continuous trigger mode (without pre-trigger), the software, TTL or analog trigger initiates a series of scans. The first scan begins immediately on receiving a trigger, while the rest are carried out each time the pacer clock fires. The process will continue until an A/D stop command is received.
If the internal trigger (or the software trigger) is selected, the trig/arm command will serve as a trigger when received by the DAQP card. For the external trigger sources (TTL or analog), the same command will be taken as an arm command, which arms the DAQP card so that the first proper trigger edge following the arm command will serve as the trigger. Unexpected edge transitions during the trigger source configuration are totally ignored if the DAQP card is not armed. The pre-trigger option can be selected in continuous mode (not in one-shot mode) with external trigger sources (not with an internal trigger). If the option is selected, the arm command starts the pacer clock so the input channels specified in the scan list will be scanned each time the pacer clock fires. The results will then be stored in the data FIFO. Once the data FIFO almost full threshold is reached, (it should be programmed as an integer multiple of the scan list length), the least recent scan is automatically discarded and the most recent scan is placed into the data FIFO. This cycle will continue until the external trigger (TTL or analog) is received. From then on, no more scans are discarded and the normal data acquisition process starts with FIFO half full of data samples. In fact, the A/D event bits (bits 3 and 4 in the status register at base + 2) will not be set until the trigger is received. This guarantees that no interrupts will be sent before the trigger is received.
The trigger position in the received data can be determined by subtracting the offset of the programmed data FIFO threshold. The position resolution will be within one pacer clock cycle. However, the trigger position cannot be determined if the trigger comes before the data FIFO is filled to it’s programmed threshold. The data lost bit in the status register will be set to indicate this error.