5.2.6 Command Register (base + 7)
The command register is used for sending control commands to the DAQP card including arm/trigger (or start A/D), scan list queue and data FIFO flush, stop A/D and timer/counter latch commands. It also sets the data program/access mode for the data FIFO. The command bits (bit 3 to 7) are actually ‘monostable’ or
The data FIFO program/access bit and the scan speed selection bits are latched each time they are written. The user must avoid changing these bits accidentally when sending the commands to the DAQP series cards. Bit definition is shown in Table
Table
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| 7 | Trigger/Arm command | 1 = send trigger/arm, 0 = no action |
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| 6 | Flush data FIFO command | 1 | = flush, 0 = no action |
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| 5 | Flush scan list command | 1 | = flush, 0 = no action |
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| 4 | Stop A/D command | 1 = stop, 0 = no action |
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| 3 | Latch timer/counter command | 1 | = latch, 0 = no action |
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| Scan rate selection | 00 = 100, 01 = 50, 10 = 25 (kHz) |
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| 0 | Data FIFO program/access | 1 = data access, 0 = program threshold |
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5.2.6.1 Trigger/Arm Command
If the trigger source is internal (software trigger), writing a “1” to bit 7 will send a trigger to the DAQP card and start the A/D conversion process. If the trigger source is external (TTL or analog), writing a “1” to bit 7 will serve as the arm command. The arm command tells the DAQP card to look for the specified external trigger edge from the moment the command is received. Never issue the arm command and the A/D stop command simultaneously. The arm command initiates data acquisition and the A/D stop command terminates it.
5.2.6.2 Flush Scan List Queue Command
The scan list queue must be flushed before it can be programmed. This command should be issued before the flush data FIFO command. The queue may have up to 2048 word entries, each containing two bytes. It is the user’s responsibility to guarantee the integrity of the entries.
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