Omega Speaker Systems PCI-DAS1001, PCI-DAS1002 manual Users Guide

Page 1

User's Guide

http://www.omega.come-mail:info@omega.com

PCI-DAS1001 PCI-DAS1002

Image 1

Contents Users Guide Table of Contents BADR2 BADR0 BADR1BADR3 BADR4Introduction Introduction InstallationDOS and/or Windows RUN InstaCalHardware Connections Connector PIN DiagramSingle-Ended and Differential Inputs Analog ConnectionsSingle-Ended Inputs Differential Inputs Differential InputWhich system do you have? System Grounds and IsolationSmall Common Mode Voltages Systems with Common Mode ground offset VoltagesLarge Common Mode Voltages Ground Category Input Configuration Our view PCI-DAS1000 and signal source already have isolated grounds Board Board Programming & Software Applications Analog Inputs SELF-CALIBRATION of the PCI-DAS1000Analog Outputs BADR1 BADR0Interrupt / ADC Fifo Register Region Function OperationsEoaie InteIntcl AdflclCHL8-CHL1, CHH8-CHH1 ADC Channel MUX and Control Register BADR1 +Pacer Source EOC= ADC Done = ADC Busy TS10 Trigger CONTROL/STATUS Register BADR1 +ARM C0SRC Fifo Mode Sample CTRXtrig IndxgtBADR1 + Calibration RegisterDAC Channel Cal Function Cal SourceDAC CONTROL/STATUS Register BADR1 + Dacen ModeDACnR10 DACnR1 DACnR0 Range LSB SizeADC Data Register BADR2 + BADR2ADC Fifo Clear Register BADR2 + MSB LSBADC Pacer Clock Data and Control Registers BADR3BADR3 + Device Counter # FunctionDigital I/O Data and Control Registers ADC 8254 Control RegisterDIO Port a Data DIO Port B DataDIO Control Register DIO Port C DataPort a Port C Port B Upper Lower OUT 8254B Counter 1 Data User Counter #5 Index and User Counter 4 Data and Control Registers8254B Counter 2 Data User Counter #6 BADR3 + AhBADR3 + Bh 8254B Control Register1 DAC0 Data Register BADR4BADR4 + 2 DAC1 Data RegisterElectrical Specifications Analog Output Environmental Power consumptionEC Declaration of Conformity