Omega Speaker Systems PCI-DAS1001, PCI-DAS1002 manual Power consumption, Environmental

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8.4 COUNTER SECTION

Counter type

82C54

Configuration

Two 82C54 devices. 3 down counters per 82C54, 16 bits each

 

82C54A:

 

Counter 0

- ADC residual sample counter.

 

Source:

ADC Clock.

 

Gate:

 

Internal programmable source.

 

Output:

End-of-Acquisition interrupt.

 

Counter 1

- ADC Pacer Lower Divider

 

Source:

10 MHz oscillator

 

Gate:

 

Tied to Counter 2 gate, programmable source.

 

Output:

Chained to Counter 2 Clock.

 

Counter 2 - ADC Pacer Upper Divider

 

Source:

Counter 1 Output.

 

Gate:

 

Tied to Counter 1 gate, programmable source.

 

Output:

ADC Pacer clock (if software selected), available at connector

 

82C54B:

 

 

 

Counter 0 - Pretrigger Mode

 

Source:

ADC Clock.

 

Gate:

 

External trigger

 

Output:

End-of-Acquisition interrupt.

 

Counter 0

- User Counter 4 (when in non-Pretrigger Mode)

 

Source:

User input at 100pin connector (CLK4) or internal 10MHz

 

 

 

(software selectable)

 

Gate:

 

User input at 100pin connector (GATE4).

 

Output:

Available at 100pin connector (OUT4).

 

Counter 1

- User Counter 5

 

Source:

User input at 100pin connector (CLK5).

 

Gate:

 

User input at 100pin connector (GATE5).

 

Output:

Available at 100pin connector (OUT5).

 

Counter 2

- User Counter 6

 

Source:

User input at 100pin connector (CLK6).

 

Gate:

 

User input at 100pin connector (GATE6).

 

Output:

Available at 100pin connector (OUT6).

Clock input frequency

10Mhz max

 

High pulse width (clock input)

30ns min

 

Low pulse width (clock input)

50ns min

 

Gate width high or low

50ns min

 

Input low voltage

0.8V max

 

Input high voltage

2.0V min

 

Output low voltage

0.4V max

 

Output high voltage

3.0V min

 

8.5 OTHER SPECIFICATIONS

Power consumption

+5V Operating (A/D converting to FIFO) 0.8A typical, 1.0A max

Environmental

 

Operating temperature range

0 to 70°C

Storage temperature range

-40 to 100°C

Humidity

0 to 90% non-condensing

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Contents Users Guide Table of Contents BADR2 BADR0 BADR1BADR3 BADR4Introduction Introduction InstallationDOS and/or Windows RUN InstaCalHardware Connections Connector PIN DiagramSingle-Ended and Differential Inputs Analog ConnectionsSingle-Ended Inputs Differential Inputs Differential InputWhich system do you have? System Grounds and IsolationSmall Common Mode Voltages Systems with Common Mode ground offset VoltagesLarge Common Mode Voltages Ground Category Input Configuration Our view PCI-DAS1000 and signal source already have isolated grounds    Board Board Programming & Software Applications Analog Inputs SELF-CALIBRATION of the PCI-DAS1000Analog Outputs BADR1 BADR0Interrupt / ADC Fifo Register Region Function OperationsEoaie InteIntcl AdflclCHL8-CHL1, CHH8-CHH1 ADC Channel MUX and Control Register BADR1 +Pacer Source EOC= ADC Done = ADC Busy TS10 Trigger CONTROL/STATUS Register BADR1 +ARM C0SRC Fifo Mode Sample CTRXtrig IndxgtBADR1 + Calibration RegisterDAC Channel Cal Function Cal SourceDAC CONTROL/STATUS Register BADR1 + Dacen ModeDACnR10 DACnR1 DACnR0 Range LSB SizeADC Data Register BADR2 + BADR2ADC Fifo Clear Register BADR2 + MSB LSBADC Pacer Clock Data and Control Registers BADR3BADR3 + Device Counter # FunctionDigital I/O Data and Control Registers ADC 8254 Control RegisterDIO Port a Data DIO Port B DataDIO Control Register DIO Port C DataPort a Port C Port B Upper Lower OUT 8254B Counter 1 Data User Counter #5 Index and User Counter 4 Data and Control Registers8254B Counter 2 Data User Counter #6 BADR3 + AhBADR3 + Bh 8254B Control Register1 DAC0 Data Register BADR4BADR4 + 2 DAC1 Data RegisterElectrical Specifications Analog Output Environmental Power consumptionEC Declaration of Conformity