Omega Speaker Systems PCI-DAS1002, PCI-DAS1001 manual Introduction

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1.0 INTRODUCTION

The PCI-DAS1002 and PCI-DAS1001 are multifunction analog and digital I/O boards designed to operate in computers with PCI bus accessory slots. The boards provide 16 single-ended/8 differential analog inputs with sample rates as high as 150 KHz. The boards also provide two analog output channels, 24-bits of parallel digital I/O and three counters. The only difference between the boards are the analog input ranges. These are shown below.

PCI-DAS1002 Bipolar: +/- 10V, 5V, 2.5V and 1.25V

Unipolar: 0-10V, 0-5V, 0-2.5V and 0-1.25V

PCI-DAS1001 Bipolar: +/- 10V, 1.0V, 0.1V and 0.01V

Unipolar: 0-10V, 0-1.0V, 0-0.1V and 0-0.01V

The boards are fully plug-and-play, with no switches or jumpers to set. The boards are fully auto- and self-calibrating with no potentiometers to adjust. All calibration is performed via software and on-board trim D/A converters.

The PCI-DAS1000 boards are fully supported by the powerful Universal Library software driver library as well as a wide variety of application software packages including DAS Wizard and HP VEE.

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Contents Users Guide Table of Contents BADR0 BADR1 BADR2BADR3 BADR4Introduction Installation IntroductionRUN InstaCal DOS and/or WindowsConnector PIN Diagram Hardware ConnectionsSingle-Ended and Differential Inputs Analog ConnectionsSingle-Ended Inputs Differential Input Differential InputsSystem Grounds and Isolation Which system do you have?Small Common Mode Voltages Systems with Common Mode ground offset VoltagesLarge Common Mode Voltages PCI-DAS1000 and signal source already have isolated grounds Ground Category Input Configuration Our view    Board Board Programming & Software Applications SELF-CALIBRATION of the PCI-DAS1000 Analog InputsAnalog Outputs BADR0 BADR1Interrupt / ADC Fifo Register Region Function OperationsInte EoaieIntcl AdflclADC Channel MUX and Control Register BADR1 + CHL8-CHL1, CHH8-CHH1Pacer Source EOC= ADC Done = ADC Busy TS10 Trigger CONTROL/STATUS Register BADR1 +ARM Fifo Mode Sample CTR C0SRCXtrig IndxgtCalibration Register BADR1 +DAC Channel Cal Function Cal SourceDacen Mode DAC CONTROL/STATUS Register BADR1 +DACnR10 DACnR1 DACnR0 Range LSB SizeBADR2 ADC Data Register BADR2 +ADC Fifo Clear Register BADR2 + MSB LSBBADR3 ADC Pacer Clock Data and Control RegistersBADR3 + Device Counter # FunctionADC 8254 Control Register Digital I/O Data and Control RegistersDIO Port a Data DIO Port B DataDIO Control Register DIO Port C DataPort a Port C Port B Upper Lower OUT Index and User Counter 4 Data and Control Registers 8254B Counter 1 Data User Counter #58254B Counter 2 Data User Counter #6 BADR3 + Ah8254B Control Register BADR3 + BhBADR4 1 DAC0 Data RegisterBADR4 + 2 DAC1 Data RegisterElectrical Specifications Analog Output Power consumption EnvironmentalEC Declaration of Conformity