Omega Speaker Systems PCI-DAS1002, PCI-DAS1001 SELF-CALIBRATION of the PCI-DAS1000, Analog Inputs

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6.0 SELF-CALIBRATION OF THE PCI-DAS1000

The PCI-DAS1000 is shipped fully-calibrated from the factory with cal coefficients stored in nvRAM. At run time, these calibration factors are loaded into system memory and are automatically retrieved each time a different DAC/ADC range is specified. The user has the option to recalibrate with respect to the factory-measured voltage standards at any time by simply selecting the "Calibrate" option in InstaCal. Full calibration typically requires less than two minutes and requires no user intervention.

6.1CALIBRATION CONFIGURATION

6.1.1Analog Inputs

The PCI-DAS1000 provides self-calibration of the analog source and measure systems thereby eliminating the need for external equipment and user adjustments. All adjustments are made via 8-bit calibration DACs or 7-bit digital potentiome- ters referenced to an on-board factory calibrated standard. Calibration factors are stored on the serial nvRAM..

A variety of methods are used to calibrate the different elements on the board. The analog front-end has several knobs to turn. Offset calibration is performed in the instrumentation amplifier gain stage. Front-end gain adjustment is performed via a variable attenuator/gain stage.

The analog output circuits are calibrated for both gain and offset. Offset adjustments for the analog output are made in the output buffer section. The tuning range of this adjustment allows for max DAC and output buffer offsets. Gain calibration of the analog outputs are performed via DAC reference adjustments.

Figure 1 below is a block diagram of the analog front-end calibration system:

Cal

RefPGA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Offset Adj

 

 

 

 

8

 

 

 

 

 

O f f s e t

 

 

 

 

 

T r i m D a c

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Coarse)

 

 

 

 

 

 

 

 

T r i m D a c

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Fi ne)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Variable Gain

ADC

7

Digital Offset Pot

Figure 1

15

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Contents Users Guide Table of Contents BADR3 BADR0 BADR1BADR2 BADR4Introduction Installation IntroductionRUN InstaCal DOS and/or WindowsConnector PIN Diagram Hardware ConnectionsAnalog Connections Single-Ended and Differential InputsSingle-Ended Inputs Differential Input Differential InputsSystem Grounds and Isolation Which system do you have?Systems with Common Mode ground offset Voltages Small Common Mode VoltagesLarge Common Mode Voltages PCI-DAS1000 and signal source already have isolated grounds Ground Category Input Configuration Our view    Board Board Programming & Software Applications SELF-CALIBRATION of the PCI-DAS1000 Analog InputsAnalog Outputs Interrupt / ADC Fifo Register BADR0BADR1 Region Function OperationsIntcl InteEoaie AdflclADC Channel MUX and Control Register BADR1 + CHL8-CHL1, CHH8-CHH1EOC Pacer Source= ADC Done = ADC Busy Trigger CONTROL/STATUS Register BADR1 + TS10ARM Xtrig Fifo Mode Sample CTRC0SRC IndxgtDAC Channel Cal Function Calibration RegisterBADR1 + Cal SourceDACnR10 Dacen ModeDAC CONTROL/STATUS Register BADR1 + DACnR1 DACnR0 Range LSB SizeADC Fifo Clear Register BADR2 + BADR2ADC Data Register BADR2 + MSB LSBBADR3 + BADR3ADC Pacer Clock Data and Control Registers Device Counter # FunctionDIO Port a Data ADC 8254 Control RegisterDigital I/O Data and Control Registers DIO Port B DataDIO Port C Data DIO Control RegisterPort a Port C Port B Upper Lower OUT 8254B Counter 2 Data User Counter #6 Index and User Counter 4 Data and Control Registers8254B Counter 1 Data User Counter #5 BADR3 + Ah8254B Control Register BADR3 + BhBADR4 + BADR41 DAC0 Data Register 2 DAC1 Data RegisterElectrical Specifications Analog Output Power consumption EnvironmentalEC Declaration of Conformity
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