Cypress CY7C1292DV18, CY7C1294DV18 manual Maximum Ratings, Operating Range, Capacitance

Page 17

CY7C1292DV18

CY7C1294DV18

Maximum Ratings

(Above which the useful life may be impaired.)

Storage Temperature

–65°C to +150°C

Ambient Temperature with

 

 

Power Applied

–55°C to +125°C

Supply Voltage on VDD Relative to GND

–0.5V to +2.9V

Supply Voltage on VDDQ Relative to GND

–0.5V to +VDD

DC Voltage Applied to Outputs

–0.5V to VDDQ + 0.3V

in High-Z State

DC Input Voltage[11]

–0.5V to V + 0.3V

 

 

DD

Current into Outputs (LOW)

 

 

 

 

20 mA

Static Discharge Voltage

 

 

 

 

> 2001V

(per MIL-STD-883, Method 3015)

 

 

 

 

Latch-up Current

 

 

 

 

> 200 mA

Operating Range

 

 

 

 

 

 

 

 

 

 

 

 

Range

Ambient

V

 

[19]

V

[19]

Temperature (T )

DD

 

A

 

 

 

DDQ

Com’l

0°C to +70°C

1.8 ± 0.1 V

1.4V to VDD

Ind’l

–40°C to +85°C

 

 

 

 

 

 

 

 

 

 

 

 

Electrical Characteristics Over the Operating Range[12, 19]

DC Electrical Characteristics Over the Operating Range

Parameter

 

 

Description

 

 

Test Conditions

 

 

Min.

 

Typ.

 

Max.

 

Unit

VDD

Power Supply Voltage

 

 

 

 

 

 

1.7

 

1.8

1.9

 

 

V

VDDQ

I/O Supply Voltage

 

 

 

 

 

 

1.4

 

1.5

 

 

VDD

 

V

VOH

Output HIGH Voltage

 

Note 17

 

VDDQ/2 – 0.12

 

 

 

 

VDDQ/2 + 0.12

V

VOL

Output LOW Voltage

 

Note 18

 

VDDQ/2 – 0.12

 

 

 

 

VDDQ/2 + 0.12

V

VOH(LOW)

Output HIGH Voltage

 

IOH = 0.1 mA, Nominal Impedance

VDDQ – 0.2

 

 

 

 

 

VDDQ

 

V

VOL(LOW)

Output LOW Voltage

 

IOL = 0.1 mA, Nominal Impedance

 

VSS

 

 

 

 

0.2

 

 

V

VIH

Input HIGH Voltage[11]

 

 

 

 

 

 

VREF + 0.1

 

 

 

 

 

VDDQ+0.3

 

V

VIL

Input LOW Voltage[11]

 

 

 

 

 

 

 

–0.3

 

 

 

 

 

VREF – 0.1

 

V

IX

Input Leakage Current

 

GND VI VDDQ

 

 

5

 

 

 

 

5

 

 

A

IOZ

Output Leakage Current

 

GND VI VDDQ, Output Disabled

 

5

 

 

 

 

5

 

 

A

VREF

Input Reference Voltage[20]

 

Typical Value = 0.75V

 

0.68

 

0.75

0.95

 

 

V

IDD

VDD Operating Supply

 

VDD = Max., IOUT = 0 mA,

 

167 MHz

 

 

 

 

 

 

500

 

 

mA

 

 

 

 

 

f = fMAX = 1/tCYC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

200 MHz

 

 

 

 

 

 

550

 

 

mA

 

 

 

 

 

 

 

 

 

250 MHz

 

 

 

 

 

 

600

 

 

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISB1

Automatic Power-down

 

Max. VDD, Both Ports

 

167 MHz

 

 

 

 

 

 

240

 

 

mA

 

Current

 

Deselected, VIN VIH or

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

200 MHz

 

 

 

 

 

 

260

 

 

mA

 

 

 

 

 

VIN VIL f = fMAX = 1/tCYC,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

250 MHz

 

 

 

 

 

 

280

 

 

mA

 

 

 

 

 

Inputs Static

 

 

 

 

 

 

 

 

 

AC Input Requirements Over the Operating Range

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

Description

 

 

Test Conditions

 

Min.

 

Typ.

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

 

Input HIGH Voltage

 

 

 

 

 

 

VREF + 0.2

 

 

 

 

V

VIL

 

Input LOW Voltage

 

 

 

 

 

 

 

 

 

VREF - 0.2

 

V

Capacitance[21]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

Description

 

 

 

 

Test Conditions

 

 

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CIN

 

 

Input Capacitance

 

 

TA = 25°C, f = 1 MHz,

 

 

 

 

 

 

5

 

 

pF

 

 

 

 

 

 

VDD = 1.8V

 

 

 

 

 

 

 

 

 

 

 

CCLK

 

 

Clock Input Capacitance

 

 

 

 

 

 

 

 

 

6

 

 

pF

 

 

 

 

 

 

 

VDDQ = 1.5V

 

 

 

 

 

 

 

 

 

 

 

 

CO

 

 

Output Capacitance

 

 

 

 

 

 

 

 

 

7

 

 

pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes:

17.Output are impedance controlled. IOH = –(VDDQ/2)/(RQ/5) for values of 175<= RQ <= 350s.

18.Output are impedance controlled. IOL = (VDDQ/2)/(RQ/5) for values of 175<= RQ <= 350.

19.Power-up: Assumes a linear ramp from 0V to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.

20.VREF (Min.) = 0.68V or 0.46VDDQ, whichever is larger, VREF (Max.) = 0.95V or 0.54VDDQ, whichever is smaller.

21.Tested initially and after any design or process change that may affect these parameters.

Document #: 001-00350 Rev. *A

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Contents Configurations FeaturesFunctional Description Selection GuideDoff Logic Block Diagram CY7C1292DV18Logic Block Diagram CY7C1294DV18 Q34 Pin Configurations Ball Fbga 13 x 15 x 1.4 mm PinoutTMS TDI Pin Definitions Functional Overview DLL Write Cycle Descriptions CY7C1292DV18 2 Application Example1RPS WPS BWSWrite Cycle Descriptions CY7C1294DV18 2 Ieee 1149.1 Serial Boundary Scan Jtag Idcode EXIT2-IR UPDATE-DR UPDATE-IR TAP Controller State Diagram9Parameter Description Test Conditions Min Max Unit TAP Controller Block DiagramTAP Timing and Test Conditions13 TAP AC Switching Characteristics Over the Operating Range13Parameter Description Min Max Unit Hold TimesScan Register Sizes Identification Register DefinitionsInstruction Codes Register Name Bit SizeBit # Bump ID Boundary Scan OrderPower-up Waveforms Power-Up Sequence in QDR-II SramPower-Up Sequence DLL ConstraintsMaximum Ratings Electrical Characteristics Over the Operating Range12Operating Range CapacitanceAC Test Loads and Waveforms Thermal Resistance21Parameter Description Test Conditions Fbga Unit Test conditions follow standard test 28.51Set-up Times Switching Characteristics Over the Operating Range22Output Times DLL TimingRead/Write/Deselect Sequence Switching Waveforms27, 28Write Read Write NOPOrdering Information PIN 1 Corner Package DiagramDocument History ECN No Issue Date Orig. Description of ChangeREV SYT