Cypress CY7C1294DV18, CY7C1292DV18 manual TAP Controller Block Diagram

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CY7C1292DV18

CY7C1294DV18

TAP Controller Block Diagram

TDI

TCK

Selection Circuitry

0

Bypass Register

2 1 0 Instruction Register

31 30 29 . . 2 1 0 Identification Register

106 . . . . 2 1 0 Boundary Scan Register

Selection

Circuitry

TDO

TMS

TAP Controller

TAP Electrical Characteristics Over the Operating Range [10, 11, 12]

Parameter

Description

Test Conditions

Min.

Max.

Unit

VOH1

Output HIGH Voltage

IOH = 2.0 mA

1.4

 

V

VOH2

Output HIGH Voltage

IOH = 100 A

1.6

 

V

VOL1

Output LOW Voltage

IOL = 2.0 mA

 

0.4

V

VOL2

Output LOW Voltage

IOL = 100 A

 

0.2

V

VIH

Input HIGH Voltage

 

0.65VDD

VDD + 0.3

V

VIL

Input LOW Voltage

 

–0.3

0.35VDD

V

IX

Input and OutputLoad Current

GND VI VDD

5

5

A

Notes:

10.These characteristic pertain to the TAP inputs (TMS, TCK, TDI and TDO). Parallel load levels are specified in the Electrical Characteristics table.

11.Overshoot: VIH(AC) < VDDQ +0.85V (Pulse width less than tCYC/2), Undershoot: VIL(AC) > –1.5V (Pulse width less than tCYC/2).

12.All voltage referenced to Ground.

Document #: 001-00350 Rev. *A

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Contents Features ConfigurationsFunctional Description Selection GuideLogic Block Diagram CY7C1292DV18 Logic Block Diagram CY7C1294DV18Doff Pin Configurations Ball Fbga 13 x 15 x 1.4 mm Pinout TMS TDIQ34 Pin Definitions Functional Overview DLL Application Example1 Write Cycle Descriptions CY7C1292DV18 2RPS WPS BWSWrite Cycle Descriptions CY7C1294DV18 2 Ieee 1149.1 Serial Boundary Scan Jtag Idcode TAP Controller State Diagram9 EXIT2-IR UPDATE-DR UPDATE-IRTAP Controller Block Diagram Parameter Description Test Conditions Min Max UnitTAP AC Switching Characteristics Over the Operating Range13 TAP Timing and Test Conditions13Parameter Description Min Max Unit Hold TimesIdentification Register Definitions Scan Register SizesInstruction Codes Register Name Bit SizeBoundary Scan Order Bit # Bump IDPower-Up Sequence in QDR-II Sram Power-up WaveformsPower-Up Sequence DLL ConstraintsElectrical Characteristics Over the Operating Range12 Maximum RatingsOperating Range CapacitanceThermal Resistance21 AC Test Loads and WaveformsParameter Description Test Conditions Fbga Unit Test conditions follow standard test 28.51Switching Characteristics Over the Operating Range22 Set-up TimesOutput Times DLL TimingSwitching Waveforms27, 28 Read/Write/Deselect SequenceWrite Read Write NOPOrdering Information Package Diagram PIN 1 CornerECN No Issue Date Orig. Description of Change Document HistoryREV SYT