CY7C1411BV18, CY7C1426BV18
CY7C1413BV18, CY7C1415BV18
Document History Page
Document Title: CY7C1411BV18/CY7C1426BV18/CY7C1413BV18/CY7C1415BV18,
Burst Architecture
Document Number:
REV. | ECN NO. | SUBMISSION | ORIG. OF | DESCRIPTION OF CHANGE |
DATE | CHANGE | |||
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** | 433267 | See ECN | NXR | New Data Sheet |
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*A | 462004 | See ECN | NXR | Changed tTH and tTL from 40 ns to 20 ns, changed tTMSS, tTDIS, tCS, tTMSH, tTDIH, |
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| tCH from 10 ns to 5 ns and changed tTDOV from 20 ns to 10 ns in TAP AC Switching |
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| Characteristics table |
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| Modified Power Up waveform |
*B | 850381 | See ECN | VKN | Minor change: Moved datasheet to the web |
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*C | 1523289 | See ECN | VKN/AESA | Converted from preliminary to final, Updated Logic Block diagram, Updated |
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| IDD/ISB specs, Changed DLL minimum operating frequency from 80MHz to |
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| 120MHz, Changed tCYC max spec to 8.4ns, Modified footnotes 22 and 30 |
*D | 2478647 | See ECN | VKN/AESA | Changed Ambient Temperature with Power Applied from |
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| sequence waveform and it’s description, Updated IDD/ISB specs, Added footnote |
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| #21 related to IDD, Changed JTAG ID [31:29] from 001 to 000. |
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.
Products |
| PSoC Solutions |
| |
PSoC | psoc.cypress.com | General | psoc.cypress.com/solutions | |
Clocks & Buffers | clocks.cypress.com | Low Power/Low Voltage | ||
Wireless | wireless.cypress.com | Precision Analog | ||
LCD Drive | ||||
Memories | memory.cypress.com | |||
CAN 2.0b | psoc.cypress.com/can | |||
Image Sensors | image.cypress.com | |||
USB | psoc.cypress.com/usb | |||
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© Cypress Semiconductor Corporation,
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal,
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in
Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: | Revised June 16, 2008 | Page 30 of 30 |
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, IDT, NEC, Renesas, and Samsung. All product and company names mentioned in this document are the trademarks of their respective holders.
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