Cypress CY7C1387F, CY7C1386F, CY7C1386D manual Pin Configurations Ball Fbga Pinout 3 Chip Enable

Page 5

CY7C1386D, CY7C1386F

CY7C1387D, CY7C1387F

Pin Configurations (continued)

165-Ball FBGA Pinout (3 Chip Enable)

CY7C1386D (512K x 36)

1

2

3

4

5

6

7

8

9

10

11

A

NC/288M

A

A

NC

CE

1

BW

C

BW

B

CE

3

BWE

ADSC

ADV

B

NC/144M

A

CE2

CLK

A

NC/512M

BW

D

BW

A

GW

OE

ADSP

C

DQPC

NC

VDDQ

VSS

VSS

VSS

VSS

VSS

VDDQ

NC/1G

DQPB

D

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

E

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

F

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

G

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

H

NC

NC

NC

VDD

VSS

VSS

VSS

VDD

NC

NC

ZZ

J

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

K

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

L

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

M

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

N

DQPD

NC

VDDQ

VSS

NC

A

NC

VSS

VDDQ

NC

DQPA

P

NC

NC/72M

A

A

TDI

A1

TDO

A

A

A

A

R

MODE

NC/36M

A

A

TMS

A0

TCK

A

A

A

A

CY7C1387D (1M x 18)

1

2

3

4

5

6

7

8

9

10

11

A

NC/288M

A

1

B

NC

3

A

A

CE

BW

CE

BWE

ADSC

ADV

B

NC/144M

A

CE2

NC

A

CLK

A

NC/576M

BW

GW

OE

ADSP

C

NC

NC

VDDQ

VSS

VSS

VSS

VSS

VSS

VDDQ

NC/1G

DQPA

D

NC

DQB

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQA

E

NC

DQB

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQA

F

NC

DQB

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQA

G

NC

DQB

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQA

H

NC

NC

NC

VDD

VSS

VSS

VSS

VDD

NC

NC

ZZ

J

DQB

NC

VDDQ

VDD

‘VSS

VSS

VSS

VDD

VDDQ

DQA

NC

K

DQB

NC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

NC

L

DQB

NC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

NC

M

DQB

NC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

NC

N

DQPB

NC

VDDQ

VSS

NC

A

NC

VSS

VDDQ

NC

NC

P

NC

NC/72M

A

A

TDI

A1

TDO

A

A

A

A

R

MODE

NC/36M

A

A

TMS

A0

TCK

A

A

A

A

Document Number: 38-05545 Rev. *E

Page 5 of 30

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Contents Selection Guide Features250 MHz 200 MHz 167 MHz Unit Cypress Semiconductor CorporationLogic Block Diagram CY7C1387D/CY7C1387F 3 1M x Logic Block Diagram CY7C1386D/CY7C1386F 3 512K xCY7C1387D 1M x Pin Configurations Pin Tqfp Pinout 3 Chip EnablesCY7C1386D 512K X Pin Configurations Ball BGA Pinout 1 Chip Enable Pin Configurations Ball Fbga Pinout 3 Chip Enable Pin Definitions Power supply inputs to the core of the deviceName Description Byte write select inputs, active LOW. Qualified withFunctional Overview ZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Operation Add. Used Function CY7C1387D/CY7C1387F Truth Table for Read/Write 6Function CY7C1386D/CY7C1386F TAP Controller Block Diagram TAP Controller State DiagramTAP Instruction Set Bypass RegisterTAP Timing TAP AC Switching Characteristics5V TAP AC Test Conditions 3V TAP AC Test Conditions3V TAP AC Output Load Equivalent GND VIN VddqScan Register Sizes Identification Register DefinitionsIdentification Codes Register Name Bit SizeInternal Ball BGA Boundary Scan Order 14Bit # Ball ID M11 A10 B10M10 G10 F10 InternalMaximum Ratings Electrical CharacteristicsOperating Range Range AmbientAC Test Loads and Waveforms CapacitanceThermal Resistance Description 250 200 167 Unit Parameter Min Switching Characteristics Over the Operating Range 20Read Cycle Timing Switching WaveformsAdsc Write Cycle Timing 26Read/Write Cycle Timing 26, 28 ZZ Mode Timing 30 Ordering Information CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Pin Thin Plastic Quad Flat pack 14 x 20 x 1.4 mm Package DiagramsBall BGA 14 x 22 x 2.4 mm Ball Fbga 13 x 15 x 1.4 mm Document Number Issue Date Orig. Description of ChangeDocument History