Cypress CY7C1386D, CY7C1386F 3V TAP AC Test Conditions, 5V TAP AC Test Conditions, GND VIN Vddq

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CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F

3.3V TAP AC Test Conditions

Input pulse levels	VSS to 3.3V
Input rise and fall times	1 ns
Input timing reference levels	1.5V
Output reference levels	1.5V
Test load termination supply voltage	1.5V

2.5V TAP AC Test Conditions

Input pulse levels	VSS to 2.5V
Input rise and fall time	1 ns
Input timing reference levels	1.25V
Output reference levels	1.25V
Test load termination supply voltage	1.25V

3.3V TAP AC Output Load Equivalent	2.5V TAP AC Output Load Equivalent
1.5V	1.25V

TDO ZO= 50 Ω

50Ω

	TDO
20pF			ZO= 50	Ω
			ZO= 50	Ω

50Ω

20pF

TAP DC Electrical Characteristics And Operating Conditions (0°C < TA < +70°C; VDD = 3.3V ±0.165V unless otherwise noted) [12]

Parameter	Description	Test Conditions		Min	Max	Unit
VOH1	Output HIGH Voltage	IOH = –4.0 mA, VDDQ = 3.3V		2.4		V
		IOH = –1.0 mA, VDDQ = 2.5V		2.0		V
VOH2	Output HIGH Voltage	IOH = –100 µA	VDDQ = 3.3V	2.9		V
			VDDQ = 2.5V	2.1		V
VOL1	Output LOW Voltage	IOL = 8.0 mA, VDDQ = 3.3V			0.4	V
		IOL = 8.0 mA, VDDQ = 2.5V			0.4	V
VOL2	Output LOW Voltage	IOL = 100 µA	VDDQ = 3.3V		0.2	V
			VDDQ = 2.5V		0.2	V
VIH	Input HIGH Voltage	VDDQ = 3.3V		2.0	VDD + 0.3	V
		VDDQ = 2.5V		1.7	VDD + 0.3	V
VIL	Input LOW Voltage	VDDQ = 3.3V		–0.5	0.7	V
		VDDQ = 2.5V		–0.3	0.7	V
IX	Input Load Current	GND < VIN < VDDQ		–5	5	µA

Note

12. All voltages referenced to VSS (GND).

Document Number: 38-05545 Rev. *E

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Contents 250 MHz 200 MHz 167 MHz Unit FeaturesSelection Guide Cypress Semiconductor CorporationLogic Block Diagram CY7C1386D/CY7C1386F 3 512K x Logic Block Diagram CY7C1387D/CY7C1387F 3 1M xCY7C1387D 1M x Pin Configurations Pin Tqfp Pinout 3 Chip EnablesCY7C1386D 512K X Pin Configurations Ball BGA Pinout 1 Chip Enable Pin Configurations Ball Fbga Pinout 3 Chip Enable Name Description Power supply inputs to the core of the devicePin Definitions Byte write select inputs, active LOW. Qualified withFunctional Overview ZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Operation Add. Used Function CY7C1387D/CY7C1387F Truth Table for Read/Write 6Function CY7C1386D/CY7C1386F TAP Controller State Diagram TAP Controller Block DiagramBypass Register TAP Instruction SetTAP AC Switching Characteristics TAP Timing3V TAP AC Output Load Equivalent 3V TAP AC Test Conditions5V TAP AC Test Conditions GND VIN VddqIdentification Codes Identification Register DefinitionsScan Register Sizes Register Name Bit SizeInternal Ball BGA Boundary Scan Order 14Bit # Ball ID M10 A10 B10M11 G10 F10 InternalOperating Range Electrical CharacteristicsMaximum Ratings Range AmbientAC Test Loads and Waveforms CapacitanceThermal Resistance Switching Characteristics Over the Operating Range 20 Description 250 200 167 Unit Parameter MinSwitching Waveforms Read Cycle TimingWrite Cycle Timing 26 AdscRead/Write Cycle Timing 26, 28 ZZ Mode Timing 30 Ordering Information CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Package Diagrams Pin Thin Plastic Quad Flat pack 14 x 20 x 1.4 mmBall BGA 14 x 22 x 2.4 mm Ball Fbga 13 x 15 x 1.4 mm Document Number Issue Date Orig. Description of ChangeDocument History