Cypress CY14B104N, CY14B104L Truth Table For Sram Operations, Inputs/Outputs2 Mode Power, High Z

Page 15

 

 

 

 

 

 

 

 

 

 

 

 

CY14B104L, CY14B104N

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Truth Table For SRAM Operations

 

 

 

 

 

 

 

should remain HIGH for SRAM Operations.

 

 

 

 

 

HSB

 

 

 

 

 

For x8 Configuration

 

 

 

 

 

 

 

 

 

CE

 

 

WE

 

 

OE

 

Inputs/Outputs[2]

Mode

 

Power

 

 

 

H

 

 

X

 

X

High Z

Deselect/Power down

 

Standby

 

 

 

 

L

 

 

H

 

L

Data Out (DQ0–DQ7);

Read

 

Active

 

 

 

 

L

 

 

H

 

H

High Z

Output Disabled

 

Active

 

 

 

 

L

 

 

L

 

X

Data in (DQ0–DQ7);

Write

 

Active

 

 

For x16 Configuration

 

CE

 

 

WE

 

 

OE

 

 

BHE

 

 

BLE

 

Inputs/Outputs[2]

Mode

Power

 

H

 

 

X

 

 

X

 

 

X

 

 

X

 

High-Z

Deselect/Power down

Standby

 

L

 

 

X

 

 

X

 

 

H

 

 

H

 

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

L

 

 

L

 

 

L

 

Data Out (DQ0–DQ15)

Read

Active

 

L

 

 

H

 

 

L

 

 

H

 

 

L

 

Data Out (DQ0–DQ7);

Read

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ8–DQ15in High-Z

 

 

 

L

 

 

H

 

 

L

 

 

L

 

 

H

 

Data Out (DQ8–DQ15);

Read

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7in High-Z

 

 

 

L

 

 

H

 

 

H

 

 

L

 

 

L

 

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

H

 

 

H

 

 

L

 

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

H

 

 

L

 

 

H

 

High-Z

Output Disabled

Active

 

L

 

 

L

 

 

X

 

 

L

 

 

L

 

Data In (DQ0–DQ15)

Write

Active

 

L

 

 

L

 

 

X

 

 

H

 

 

L

 

Data In (DQ0–DQ7);

Write

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ8–DQ15in High-Z

 

 

 

L

 

 

L

 

 

X

 

 

L

 

 

H

 

Data In (DQ8–DQ15);

Write

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7in High-Z

 

 

Document #: 001-07102 Rev. *L

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram1, 2 Functional DescriptionTsop PinoutsTop View Not to scalePin Definitions AutoStore Operation Device OperationSram Read Sram WriteSoftware Store Hardware Recall Power UpMode Selection A15 A07 Mode PowerNoise Considerations Mode Selection A15 A07 PowerPreventing AutoStore Data ProtectionRange DC Electrical CharacteristicsMaximum Ratings Operating RangeAC Test Conditions Data Retention and EnduranceCapacitance Thermal ResistanceSram Read Cycle AC Switching CharacteristicsSwitching Waveforms Min MaxCY14B104L, CY14B104N Sram Write Cycle #2 CE Controlled 3, 17, 18 AutoStore/Power Up Recall Parameters Description CY14B104L/CY14B104N Unit Min MaxHSB Parameters Description 20 ns 25 ns 45 ns Unit Min Max Software Controlled STORE/RECALL CycleHardware Store Cycle Hardware Store Pulse WidthHardware Store LOW to Store Busy 500 Inputs/Outputs2 Mode Power Truth Table For Sram OperationsHigh Z Ordering Information CY14B104L-BA45XIT CY14B104L-ZS45XCTCY14B104L-ZS45XIT CY14B104L-BA45XCTNvsram Part Numbering NomenclatureCY 14 B 104 L ZS P 20 X C T ZS TsopPin Tsop II Package DiagramsBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 UHA Document HistoryTUP PCIGVCH/PYRS GVCH/DSG AesaUSB Sales, Solutions, and Legal Information