Cypress CY14B108N, CY14B108L manual 51-85160

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PRELIMINARY	CY14B108L, CY14B108N

Figure 17. 54-Pin TSOP II (51-85160)

Document #: 001-45523 Rev. *B

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Contents Functional Description FeaturesLogic Block Diagram1, 2 Cypress Semiconductor CorporationTop View PinoutsNot to scale Byte Low Enable, Active LOW . Controls DQ 7 DQ Output Enable, Active LOW . The active LO WByte High Enable, Active LOW . Controls DQ 15 DQ Power Supply Inputs to the DeviceSram Write Device OperationSram Read AutoStore OperationSoftware Store Hardware Recall Power UpSoftware Recall Store Mode SelectionRecall Noise Considerations Preventing AutoStoreData Protection Best PracticesOperating Range DC Electrical CharacteristicsMaximum Ratings RangeThermal Resistance Data Retention and EnduranceCapacitance AC Test ConditionsParameters Sram Read Cycle AC Switching CharacteristicsSwitching Waveforms Sram Write CycleSram Read Cycle #2 CE and OE Controlled3, 11 Sram Write Cycle #2 AutoStore/Power Up Recall Parameters Description 20 ns 25 ns 45 ns Unit Min MaxSoftware Controlled STORE/RECALL Cycle Description 20 ns 25 ns 45 ns Unit Min Max To Output Active Time when write latch not setHardware Store Cycle Hardware Store Pulse WidthTruth Table For Sram Operations Inputs/Outputs Mode PowerHigh Z CY14B108N-ZSP20XIT Ordering InformationCY14B108N-ZSP20XCT CY14B108N-ZSP25XCTCY14B108N-ZSP45XCT CY14B108N-ZSP45XITZS Tsop Part Numbering NomenclatureCY 14 B 108L-ZS P 20 X C T NvsramPackage Diagrams Pin Tsop IIBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 Gvch Document HistoryGVCH/PYRS Sales, Solutions, and Legal Information USB