ELAN Home Systems EM78P458AM manual IOC50 ~ IOC60 I/O Port Control Register, PSR2 PSR1 PSR0

Page 14

EM78P458/459

OTP ROM

2. CONT (Control Register)


7			6		5			4		3	2	1	0
	INTE		INT		TS			TE		PAB	PSR2	PSR1	PSR0
• Bit 0 (PSR0) ~ Bit 2 (PSR2) TCC/WDT prescaler bits.

	PSR2		PSR1	PSR0			TCC Rate		WDT Rate
	0		0	0			1:2		1:1
	0		0	1			1:4		1:2
	0		1	0			1:8		1:4
	0		1	1			1:16		1:8
	1		0	0			1:32		1:16
	1		0	1			1:64		1:32
	1		1	0			1:128		1:64
	1		1	1			1:256		1:128

•Bit 3 (PAB) Prescaler assignment bit.

0:TCC;

1:WDT.

•Bit 4 (TE) TCC signal edge

0:increment if the transition from low to high takes place on the TCC pin;

1:increment if the transition from high to low takes place on the TCC pin.

•Bit 5 (TS) TCC signal source

0:internal instruction cycle clock. If P54 is used as I/O pin, TS must be 0.

1:transition on the TCC pin

•Bit 6 (INT) Interrupt enable flag

0:masked by DISI or hardware interrupt

1:enabled by the ENI/RETI instructions

•Bit 7 (INTE) INT signal edge

0:interrupt occurs at the rising edge on the INT pin

1:interrupt occurs at the falling edge on the INT pin

•CONT register is both readable and writable.

3.IOC50 ~ IOC60 (I/O Port Control Register)

•"1" puts the relative I/O pin into high impedance, while "0" defines the relative I/O pin as output.

•IOC50 and IOC60 registers are both readable and writable.

This specification is subject to change without prior notice.

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07.01.2003 (V1.3)

Image 14

Contents EM78P458/459 BIT MICRO-CONTROLLEREM78P458/459 Application NoteGeneral Description Features EM78P458/459 PIN Assignment EM78P459 Pin Description R0 Indirect Addressing Register Function DescriptionOperational Registers R1 Time Clock /CounterProgram Counter Organization R5 ~ R6 Port 5 ~ Port R3 Status RegisterR4 RAM Select Register R7 ~ R8 Data Memory Configuration 10. RB R9 Adcon Analog to Digital ControlRA Addata the converted value of ADC 11. RCRF Interrupt Status Register Special Purpose Registers13. RE 15. R10 ~ R3FInte INT PAB PSR2 PSR1 PSR0 Control RegisterIOC50 ~ IOC60 I/O Port Control Register Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bitsVrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 IOC90 Gcon I/O Configuration & Control of ADCOP2E OP1E Bit4Bit2 IMS2IMS0 Description of AD Configuration Control BitsIOCB0 Pull-down Control Register IMS2IMS0IOCC0 Open-Drain Control Register IOCD0 Pull-high Control RegisterWdte EIS IOCE0 WDT Control RegisterIOCF0 Interrupt Mask Register Cmpie PWM2IE PWM1IE Adie Exie Icie TcieIOC51 Pwmcon PWM2E PWM1E T2EN T1ENBit 5Bit 3 VOF12VOF10 Offset voltage bits IOC81 PRD1 Period of PWM1CALI1 SIGN1 CALI2 SIGN2IOCB1 PRD2 Period of PWM2 Bit 5Bit 3 VOF22VOF20 Offset voltage bitsTCC/WDT & Prescaler Block Diagram of TCC and WDT I/O PortsCcircuit of I/O Port and I/O Control Register for Port Circuit of I/O Port and I/O Control Register for P60~P67 Usage of Port 6 Input Changed Wake-up/Interrupt Function Reset and Wake-upFunction of Reset and Wake-up Contw CLR R1 Status of T, and P of Status Register Values of RST, T, and P after Reset Status of RST, T and P being Affected by EventsInterrupt Analog-To-Digital Converter ADC Interrupt Input CircuitADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90 BIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 ADCON/R9GCON/IOC90 ADC Data Register ADDATA/RACKR1 and CKR0 Bit 1 and Bit 0 The conversion time select Shows the Gains and the Operating Range of ADCD Conversion Time D Operation During Sleep ModeD Sampling Time Programming Steps/ConsiderationsDemonstration Programs CINT== 0XFIocs Adrun Adpd ADIS2 ADIS1 ADIS0 Dual Sets of PWM Pulse Width Modulation OverviewIncrement Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L Functional Block Diagram of the Dual PWMsComparator PWM Programming Procedures/StepsPWM Period Prdx PRD1 or PRD2 Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale valueTMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L TimerFunction description Prdx PRD1 and PRD2 PWM period registerComparator Timer programming procedures/stepsExternal Reference Signal Programming the Related RegistersInterrupt Using as An Operation AmplifierWake-up from Sleep Mode Initialized Values after Reset Summary of the Initialized Values for RegistersCALI1 SIGN1 Oscillator Oscillator ModesEM78P458 Crystal Oscillator/Ceramic Resonators XtalSummary of Maximum Operating Speeds EM78P459EM78P458 EM78P459 HXTLXT VddExternal RC Oscillator Mode RC Oscillator Mode with Internal Capacitor EM78P458 EM78P459 Vcc RextResidue-Voltage Protection Power-on ConsiderationsExternal Power on Reset Circuit EM78P458 EM78P459 RinCode Option Register Word Enwdt Clks PTB HLF RCT HLPBit 5 ~ Bit 0 ID5~ID0 Customer’s ID Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bitsInstruction Set List of the instruction set of EM78P458/459ADD A,R AC Test Input/Output Waveform Timing DiagramsReset Timing CLK=0 TCC Input Timing CLKS=0Absolute Maximum Ratings Electrical Characteristics Crystal type, two clocksComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0VIVR OTP MCU AppendixPackage Types DIP