ELAN Home Systems EM78P458 D Sampling Time, D Conversion Time, D Operation During Sleep Mode

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EM78P458/459

OTP ROM

When the A/D conversion is complete, the result is loaded to the ADDATA. The START/END bit is clear, and the ADIF is set.

3. A/D Sampling Time

The accuracy, linearity, and speed of the successive approximation A/D converter are dependent on the properties of the ADC and the comparator. The source impedance and the internal sampling impedance directly affect the time required to charge the sample holding capacitor. The application program controls the length of the sample time to meet the specified accuracy. Generally speaking, the program should wait for 1 μs for each KΩ of the analog source impedance and at least 1 μs for the low-impedance source. After the analog input channel is selected, this acquisition time must be done before the conversion can be started.

4. A/D Conversion Time

CKR0 and CKR1 select the conversion time (Tct), in terms of instruction cycles. This allows the MCU to run at the maximum frequency without sacrificing the accuracy of A/D conversion. For the EM78P458/459, the conversion time per bit is about 4μs. Table 8 shows the relationship between Tct and the maximum operating frequencies.

Table 9 Tct vs. the Maximum Operation Frequency

CKR0:CKR1	Operation Mode	Max. operation frequency
00	Fsco/4	1 MHz
01	Fsco/16	4 MHz
10	Fsco/64	16MHz
11	Internal RC	-

5. A/D Operation During Sleep Mode

In order to reduce power consumption, the A/D conversion remains operational during sleep mode, and is obligated to implement the internal RC clock source mode. As the SLEP instruction is executed, all the operations of the MCU will stop except for the A/D conversion. The RUN bit will be cleared and the result will be fed to the ADDATA when the conversion is completed. If the ADIE is enabled, the device will wake up. Otherwise, the A/D conversion will be shut off, no matter what the status of ADPD bit is.

6.Programming Steps/Considerations

1.Programming steps

Follow these steps to obtain data from the ADC:

This specification is subject to change without prior notice.

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07.01.2003 (V1.3)

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Contents EM78P458/459 BIT MICRO-CONTROLLEREM78P458/459 Application NoteGeneral Description Features EM78P458/459 PIN Assignment EM78P459 Pin Description R0 Indirect Addressing Register Function DescriptionOperational Registers R1 Time Clock /CounterProgram Counter Organization R5 ~ R6 Port 5 ~ Port R3 Status RegisterR4 RAM Select Register R7 ~ R8Data Memory Configuration 10. RB R9 Adcon Analog to Digital ControlRA Addata the converted value of ADC 11. RCRF Interrupt Status Register Special Purpose Registers13. RE 15. R10 ~ R3FInte INT PAB PSR2 PSR1 PSR0 Control RegisterIOC50 ~ IOC60 I/O Port Control Register Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bitsOP2E OP1E IOC90 Gcon I/O Configuration & Control of ADCVrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 Bit4Bit2 IMS2IMS0 Description of AD Configuration Control BitsIOCB0 Pull-down Control Register IMS2IMS0IOCC0 Open-Drain Control Register IOCD0 Pull-high Control RegisterWdte EIS IOCE0 WDT Control RegisterIOCF0 Interrupt Mask Register Cmpie PWM2IE PWM1IE Adie Exie Icie TcieIOC51 Pwmcon PWM2E PWM1E T2EN T1ENBit 5Bit 3 VOF12VOF10 Offset voltage bits IOC81 PRD1 Period of PWM1CALI1 SIGN1 CALI2 SIGN2IOCB1 PRD2 Period of PWM2 Bit 5Bit 3 VOF22VOF20 Offset voltage bitsTCC/WDT & Prescaler Block Diagram of TCC and WDT I/O PortsCcircuit of I/O Port and I/O Control Register for Port Circuit of I/O Port and I/O Control Register for P60~P67 Function of Reset and Wake-up Reset and Wake-upUsage of Port 6 Input Changed Wake-up/Interrupt Function Contw CLR R1 Status of T, and P of Status Register Values of RST, T, and P after Reset Status of RST, T and P being Affected by EventsInterrupt Analog-To-Digital Converter ADC Interrupt Input CircuitADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90 BIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 ADCON/R9GCON/IOC90 ADC Data Register ADDATA/RACKR1 and CKR0 Bit 1 and Bit 0 The conversion time select Shows the Gains and the Operating Range of ADCD Conversion Time D Operation During Sleep ModeD Sampling Time Programming Steps/ConsiderationsDemonstration Programs CINT== 0XFIocs Adrun Adpd ADIS2 ADIS1 ADIS0 Dual Sets of PWM Pulse Width Modulation OverviewIncrement Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L Functional Block Diagram of the Dual PWMsComparator PWM Programming Procedures/StepsPWM Period Prdx PRD1 or PRD2 Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale valueTMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L TimerFunction description Prdx PRD1 and PRD2 PWM period registerComparator Timer programming procedures/stepsExternal Reference Signal Programming the Related RegistersWake-up from Sleep Mode Using as An Operation AmplifierInterrupt Initialized Values after Reset Summary of the Initialized Values for RegistersCALI1 SIGN1 Oscillator Oscillator ModesEM78P458 Crystal Oscillator/Ceramic Resonators XtalSummary of Maximum Operating Speeds EM78P459EM78P458 EM78P459 HXTLXT VddExternal RC Oscillator Mode RC Oscillator Mode with Internal Capacitor EM78P458 EM78P459 Vcc RextResidue-Voltage Protection Power-on ConsiderationsExternal Power on Reset Circuit EM78P458 EM78P459 RinCode Option Register Word Enwdt Clks PTB HLF RCT HLPBit 5 ~ Bit 0 ID5~ID0 Customer’s ID Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bitsInstruction Set List of the instruction set of EM78P458/459ADD A,R AC Test Input/Output Waveform Timing DiagramsReset Timing CLK=0 TCC Input Timing CLKS=0Absolute Maximum Ratings Electrical Characteristics Crystal type, two clocksComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0VIVR OTP MCU AppendixPackage Types DIP