ELAN Home Systems EM78P459AK, EM78P459AM, EM78P458AM, EM78P458AP Iocs Adrun Adpd ADIS2 ADIS1 ADIS0

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EM78P458/459

OTP ROM

;ADC Control Registers
ADDATA == 0xA	; The contents are the results of ADC
ADCON R== 0x9	;	7	6	5		4	3	2	1	0
	;	-	-	IOCS		ADRUN ADPD ADIS2 ADIS1 ADIS0
ADCONC== 0xA	;	7		6	5	4	3	2	1	0
	; VREFS			X	X	IMS2	IMS1	IMS0	CKR1	CKR0
GCON == 0x9	;	7		6	5	4	3	2	1	0
	; OPE2		OPE1		G22 G21		G20	G12	G11	G10
;To define bits
;In ADCONR
ADRUN == 0x4	; ADC is executed as the bit is set
ADPD == 0x3	; Power Mode of ADC
ORG 0	; Initial address
JMP INITIAL	;
ORG 0x08	; Interrupt vector
(User program)
CLR R_F	; To clear the ADCIF bit
BS ADCONR, ADRUN	; To start to execute the next AD conversion if necessary
RETI
INITIAL:
MOV A, @0BXXXX1XXX	; Enable the interrupt function of ADC, “X” by application
IOW C_INT
MOV A, @0xXX	; Interrupt disabled:<6>

This specification is subject to change without prior notice.				36						07.01.2003 (V1.3)

Image 36

Contents EM78P458/459 BIT MICRO-CONTROLLEREM78P458/459 Application NoteGeneral Description Features EM78P458/459 PIN Assignment EM78P459 Pin Description Function Description Operational RegistersR0 Indirect Addressing Register R1 Time Clock /CounterProgram Counter Organization R3 Status Register R4 RAM Select RegisterR5 ~ R6 Port 5 ~ Port R7 ~ R8Data Memory Configuration R9 Adcon Analog to Digital Control RA Addata the converted value of ADC10. RB 11. RCSpecial Purpose Registers 13. RERF Interrupt Status Register 15. R10 ~ R3FControl Register IOC50 ~ IOC60 I/O Port Control RegisterInte INT PAB PSR2 PSR1 PSR0 Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bitsIOC90 Gcon I/O Configuration & Control of ADC OP2E OP1EVrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 Description of AD Configuration Control Bits IOCB0 Pull-down Control RegisterBit4Bit2 IMS2IMS0 IMS2IMS0IOCC0 Open-Drain Control Register IOCD0 Pull-high Control RegisterIOCE0 WDT Control Register IOCF0 Interrupt Mask RegisterWdte EIS Cmpie PWM2IE PWM1IE Adie Exie Icie TcieIOC51 Pwmcon PWM2E PWM1E T2EN T1ENIOC81 PRD1 Period of PWM1 CALI1 SIGN1Bit 5Bit 3 VOF12VOF10 Offset voltage bits CALI2 SIGN2IOCB1 PRD2 Period of PWM2 Bit 5Bit 3 VOF22VOF20 Offset voltage bitsTCC/WDT & Prescaler Block Diagram of TCC and WDT I/O PortsCcircuit of I/O Port and I/O Control Register for Port Circuit of I/O Port and I/O Control Register for P60~P67 Reset and Wake-up Function of Reset and Wake-upUsage of Port 6 Input Changed Wake-up/Interrupt Function Contw CLR R1 Status of T, and P of Status Register Values of RST, T, and P after Reset Status of RST, T and P being Affected by EventsInterrupt Analog-To-Digital Converter ADC Interrupt Input CircuitBIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0 BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0ADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90 ADCON/R9 ADC Data Register ADDATA/RA CKR1 and CKR0 Bit 1 and Bit 0 The conversion time select GCON/IOC90 Shows the Gains and the Operating Range of ADCD Operation During Sleep Mode D Sampling TimeD Conversion Time Programming Steps/ConsiderationsDemonstration Programs CINT== 0XFIocs Adrun Adpd ADIS2 ADIS1 ADIS0 Dual Sets of PWM Pulse Width Modulation OverviewIncrement Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L Functional Block Diagram of the Dual PWMsPWM Programming Procedures/Steps PWM Period Prdx PRD1 or PRD2Comparator Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale valueTimer Function descriptionTMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L Prdx PRD1 and PRD2 PWM period registerTimer programming procedures/steps External Reference SignalComparator Programming the Related RegistersUsing as An Operation Amplifier Wake-up from Sleep ModeInterrupt Initialized Values after Reset Summary of the Initialized Values for RegistersCALI1 SIGN1 Oscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Xtal Summary of Maximum Operating SpeedsEM78P458 EM78P459HXT LXTEM78P458 EM78P459 VddExternal RC Oscillator Mode RC Oscillator Mode with Internal Capacitor EM78P458 EM78P459 Vcc RextPower-on Considerations External Power on Reset CircuitResidue-Voltage Protection EM78P458 EM78P459 RinCode Option Register Word Enwdt Clks PTB HLF RCT HLPBit 5 ~ Bit 0 ID5~ID0 Customer’s ID Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bitsInstruction Set List of the instruction set of EM78P458/459ADD A,R Timing Diagrams Reset Timing CLK=0AC Test Input/Output Waveform TCC Input Timing CLKS=0Absolute Maximum Ratings Electrical Characteristics Crystal type, two clocksComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0VIVR Appendix Package TypesOTP MCU DIP