ELAN Home Systems EM78P458, EM78P459AK, EM78P459AM manual Status of T, and P of Status Register

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EM78P458/459

OTP ROM

IOW RF

ENI (or DISI)

; Enable (or disable) global interrupt

SLEP; Sleep

NOP

Similarly, if the Comparator High Interrupt is used to wake up the EM78P458/459 (as in Case [c] above), the following instructions must be executed before SLEP:

MOV A, @0Bxx000110	; Select internal TCC clock
CONTW
CLR R1	; Clear TCC and prescaler
MOV A, @0Bxxxx1110	; Select WDT prescaler
CONTW
WDTC	; Clear WDT and prescaler
MOV A, @0B0xxxxxxx	; Disable WDT
IOW RE
MOV A, @0B01xxxxxx	; Enable comparator high interrupt
IOW RF
ENI (or DISI)	; Enable (or disable) global interrupt
SLEP	; Sleep
NOP

One problem user must be aware of, is that after waking up from the sleep mode, the WDT function will enable automatically. The WDT operation (being enabled or disabled) should be handled appropriately by software after waking up from the sleep mode.

2. The Status of T, and P of STATUS Register

A RESET condition is initiated by one of the following events:

(1)A power-on condition,

(2)A high-low-high pulse on /RESET pin, or

(3)Watchdog Timer time-out.

The values of T and P, as listed in Table 5 below, are used to check how the processor wakes up. Table 6 shows the events, which may affect the status of T and P.

This specification is subject to change without prior notice.

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Contents EM78P458/459 BIT MICRO-CONTROLLEREM78P458/459 Application NoteGeneral Description Features EM78P458/459 PIN Assignment EM78P459 Pin Description Function Description Operational RegistersR0 Indirect Addressing Register R1 Time Clock /CounterProgram Counter Organization R3 Status Register R4 RAM Select RegisterR5 ~ R6 Port 5 ~ Port R7 ~ R8Data Memory Configuration R9 Adcon Analog to Digital Control RA Addata the converted value of ADC10. RB 11. RCSpecial Purpose Registers 13. RERF Interrupt Status Register 15. R10 ~ R3FControl Register IOC50 ~ IOC60 I/O Port Control RegisterInte INT PAB PSR2 PSR1 PSR0 Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bitsOP2E OP1E IOC90 Gcon I/O Configuration & Control of ADCVrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 Description of AD Configuration Control Bits IOCB0 Pull-down Control RegisterBit4Bit2 IMS2IMS0 IMS2IMS0IOCC0 Open-Drain Control Register IOCD0 Pull-high Control RegisterIOCE0 WDT Control Register IOCF0 Interrupt Mask RegisterWdte EIS Cmpie PWM2IE PWM1IE Adie Exie Icie TcieIOC51 Pwmcon PWM2E PWM1E T2EN T1ENIOC81 PRD1 Period of PWM1 CALI1 SIGN1Bit 5Bit 3 VOF12VOF10 Offset voltage bits CALI2 SIGN2IOCB1 PRD2 Period of PWM2 Bit 5Bit 3 VOF22VOF20 Offset voltage bitsTCC/WDT & Prescaler Block Diagram of TCC and WDT I/O PortsCcircuit of I/O Port and I/O Control Register for Port Circuit of I/O Port and I/O Control Register for P60~P67 Function of Reset and Wake-up Reset and Wake-upUsage of Port 6 Input Changed Wake-up/Interrupt Function Contw CLR R1 Status of T, and P of Status Register Values of RST, T, and P after Reset Status of RST, T and P being Affected by EventsInterrupt Analog-To-Digital Converter ADC Interrupt Input CircuitBIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0 BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0ADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90 ADCON/R9ADC Data Register ADDATA/RA CKR1 and CKR0 Bit 1 and Bit 0 The conversion time selectGCON/IOC90 Shows the Gains and the Operating Range of ADCD Operation During Sleep Mode D Sampling TimeD Conversion Time Programming Steps/ConsiderationsDemonstration Programs CINT== 0XFIocs Adrun Adpd ADIS2 ADIS1 ADIS0 Dual Sets of PWM Pulse Width Modulation OverviewIncrement Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L Functional Block Diagram of the Dual PWMsPWM Programming Procedures/Steps PWM Period Prdx PRD1 or PRD2Comparator Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale valueTimer Function descriptionTMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L Prdx PRD1 and PRD2 PWM period registerTimer programming procedures/steps External Reference SignalComparator Programming the Related RegistersWake-up from Sleep Mode Using as An Operation AmplifierInterrupt Initialized Values after Reset Summary of the Initialized Values for RegistersCALI1 SIGN1 Oscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Xtal Summary of Maximum Operating SpeedsEM78P458 EM78P459HXT LXTEM78P458 EM78P459 VddExternal RC Oscillator Mode RC Oscillator Mode with Internal Capacitor EM78P458 EM78P459 Vcc RextPower-on Considerations External Power on Reset CircuitResidue-Voltage Protection EM78P458 EM78P459 RinCode Option Register Word Enwdt Clks PTB HLF RCT HLPBit 5 ~ Bit 0 ID5~ID0 Customer’s ID Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bitsInstruction Set List of the instruction set of EM78P458/459ADD A,R Timing Diagrams Reset Timing CLK=0AC Test Input/Output Waveform TCC Input Timing CLKS=0Absolute Maximum Ratings Electrical Characteristics Crystal type, two clocksComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0VIVR Appendix Package TypesOTP MCU DIP