EM78P458/459
OTP ROM
PWM2 |
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| * Defined by PWMCON (IOC51)<6, 7> | |
VREF | 15 | I | * External reference voltage for ADC | |
* Defined by | ||||
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20, 1,2 | * | |||
CO | O | * Pin CO is the output of the comparator. | ||
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| * Defined by | |
TCC | 19 | I | * Real time clock/counter with Schmitt trigger input pin; it must be tied to | |
VDD or VSS if it is not in use. | ||||
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VSS | 5 | - | Ground. |
Table 2 EM78P459 Pin Description
| Symbol | Pin No. | Type |
| Function |
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| VDD | 19, 18 | - | Power supply. |
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| OSCI | 22 | I | * XTAL type: Crystal input terminal or external clock input pin. | ||
| * RC type: RC oscillator input pin. |
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| * XTAL type: Output terminal for crystal oscillator or external clock input | ||
| OSCO | 21 | O | pin. |
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| * RC type: Clock output with a period of one instruction cycle time, the | |||||
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| prescaler is determined by the CONT register. |
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| * External clock signal input. |
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| P50 | 14 | I | * |
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| * Default value while |
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| 15~17 |
| * |
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| P51 ~ P57 | 23, 24 | I/O |
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| * Default value while |
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| 1, 2 |
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| P60 ~ P67 | 3, 4, | I/O | * |
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| 8~13 | * Default value while |
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| INT | 14 | I | * External interrupt pin triggered by falling edge. |
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| ADC1~ADC8 | 3, 4, | I | * Analog to Digital Converter. |
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| 8~13 | * Defined by |
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| PWM1, | 15, 16 | O | * Pulse width modulation outputs. |
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| PWM2 | * Defined by PWMCON (IOC51)<6, 7> |
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| VREF | 17 | I | * External reference voltage for ADC |
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| * Defined by |
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| * |
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| 24, 1, 2 | I | * ‘+’ |
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| CO | * Pin CO is the output of the comparator. |
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| * Defined by |
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| * If it remains at logic low, the device will be reset. |
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| /RESET | 20 | I | * Wake up from sleep mode when pins status changes. |
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| * Voltage on /RESET/Vpp must not be over Vdd during normal mode. | |||||
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| * |
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| TCC | 23 | I | * Real time clock/counter with Schmitt trigger input pin; it must be tied to | ||
| VDD or VSS if it is not in use. |
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| ENTCC | 5 | I | 1: Enable TCC; 0: Disable TCC. |
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| VSS | 6, 7 | - | Ground. |
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This specification is subject to change without prior notice. | 7 | 07.01.2003 (V1.3) |