Page 43
EM78P458/459
OTP ROM
•If enabled, the comparator remains active and the interrupt remains functional, even under SLEEP mode.
•If a mismatch occurs, the interrupt will wake up the device from SLEEP mode.
•The power consumption should be taken into consideration for the benefit of energy conservation.
•If the function is unemployed during SLEEP mode, turn off comparator before entering into sleep mode.
4.11The Initialized Values after Reset
Table 11 The Summary of the Initialized Values for Registers
| Address | Name | Reset Type | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 | |
| | | | | | | | | | | | |
| | | Bit Name | C57 | C56 | C55 | C54 | C53 | C52 | C51 | C50 | |
| N/A | IOC50 | Power-on | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| /RESET and WDT | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| | | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | | Bit Name | C67 | C66 | C65 | C64 | C63 | C62 | C61 | C60 | |
| N/A | IOC60 | Power-on | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| /RESET and WDT | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| | | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | | Bit Name | /PD7 | /PD6 | */PD5 | */PD4 | /PD3 | /PD2 | /PD1 | /PD0 | |
| N/A | IOCB0 | Power-on | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| /RESET and WDT | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| | | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | | Bit Name | OD7 | OD6 | OD5 | OD4 | OD3 | OD2 | OD1 | OD0 | |
| N/A | IOCC0 | Power-on | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| /RESET and WDT | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| | | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | | Bit Name | /PH7 | /PH6 | /PH5 | /PH4 | /PH3 | /PH2 | /PH1 | /PH0 | |
| N/A | IOCD0 | Power-on | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| /RESET and WDT | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| | | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | | Bit Name | WDTE | EIS | X | X | X | X | X | X | |
| N/A | IOCE0 | Power-on | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | |
| /RESET and WDT | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | |
| | | |
| | | Wake-up from Pin Changed | P | P | 1 | 1 | 1 | 1 | 1 | 1 | |
| | | Bit Name | X | CMPIE | PMW2IE | PWM1IE | ADIE | EXIE | ICIE | TCIE | |
| N/A | IOCF0 | Power-on | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| /RESET and WDT | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | | |
| | | Wake-up from Pin Changed | 0 | P | P | P | P | P | P | P | |
| | | Bit Name | OP2E | OP1E | G22 | G21 | G20 | G12 | G11 | G10 | |
| N/A | IOC90 | Power-on | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| (GCON) | /RESET and WDT | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | IOCA0 | Bit Name | VREFS | CE | COE | IMS2 | IMS1 | IMS0 | CKR1 | CKR0 | |
| | Power-on | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| N/A | (AD-CMP | |
| /RESET and WDT | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | CON) | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | | Bit Name | PWM2E | PWM2E | T2EN | T1EN | T2P1 | T2P0 | T1P1 | T1P0 | |
| N/A | IOC51 | Power-on | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| (PWMCON) | /RESET and WDT | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | |
| | | Wake-up from Pin Changed | P | P | P | P | P | P | P | P | |
| | IOC61 | Bit Name | Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | |
| N/A | (DT1L) | Power-on | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | | /RESET and WDT | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | | | | | | |
This specification is subject to change without prior notice. | 43 | | | | | 07.01.2003 (V1.3) | |
Contents
BIT MICRO-CONTROLLER
EM78P458/459
Application Note
EM78P458/459
General Description
Features
EM78P458/459
PIN Assignment
EM78P459 Pin Description
R1 Time Clock /Counter
Function Description
Operational Registers
R0 Indirect Addressing Register
Program Counter Organization
R7 ~ R8
R3 Status Register
R4 RAM Select Register
R5 ~ R6 Port 5 ~ Port
Data Memory Configuration
11. RC
R9 Adcon Analog to Digital Control
RA Addata the converted value of ADC
10. RB
15. R10 ~ R3F
Special Purpose Registers
13. RE
RF Interrupt Status Register
Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bits
Control Register
IOC50 ~ IOC60 I/O Port Control Register
Inte INT PAB PSR2 PSR1 PSR0
OP2E OP1E
IOC90 Gcon I/O Configuration & Control of ADC
Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0
IMS2IMS0
Description of AD Configuration Control Bits
IOCB0 Pull-down Control Register
Bit4Bit2 IMS2IMS0
IOCD0 Pull-high Control Register
IOCC0 Open-Drain Control Register
Cmpie PWM2IE PWM1IE Adie Exie Icie Tcie
IOCE0 WDT Control Register
IOCF0 Interrupt Mask Register
Wdte EIS
PWM2E PWM1E T2EN T1EN
IOC51 Pwmcon
CALI2 SIGN2
IOC81 PRD1 Period of PWM1
CALI1 SIGN1
Bit 5Bit 3 VOF12VOF10 Offset voltage bits
Bit 5Bit 3 VOF22VOF20 Offset voltage bits
IOCB1 PRD2 Period of PWM2
TCC/WDT & Prescaler
I/O Ports
Block Diagram of TCC and WDT
Ccircuit of I/O Port and I/O Control Register for Port
Circuit of I/O Port and I/O Control Register for P60~P67
Function of Reset and Wake-up
Reset and Wake-up
Usage of Port 6 Input Changed Wake-up/Interrupt Function
Contw CLR R1
Status of T, and P of Status Register
Status of RST, T and P being Affected by Events
Values of RST, T, and P after Reset
Interrupt
Interrupt Input Circuit
Analog-To-Digital Converter ADC
ADCON/R9
BIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0
BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0
ADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90
Shows the Gains and the Operating Range of ADC
ADC Data Register ADDATA/RA
CKR1 and CKR0 Bit 1 and Bit 0 The conversion time select
GCON/IOC90
Programming Steps/Considerations
D Operation During Sleep Mode
D Sampling Time
D Conversion Time
CINT== 0XF
Demonstration Programs
Iocs Adrun Adpd ADIS2 ADIS1 ADIS0
Overview
Dual Sets of PWM Pulse Width Modulation
Functional Block Diagram of the Dual PWMs
Increment Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L
Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale value
PWM Programming Procedures/Steps
PWM Period Prdx PRD1 or PRD2
Comparator
Prdx PRD1 and PRD2 PWM period register
Timer
Function description
TMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L
Programming the Related Registers
Timer programming procedures/steps
External Reference Signal
Comparator
Wake-up from Sleep Mode
Using as An Operation Amplifier
Interrupt
Summary of the Initialized Values for Registers
Initialized Values after Reset
CALI1 SIGN1
Oscillator Modes
Oscillator
EM78P459
Crystal Oscillator/Ceramic Resonators Xtal
Summary of Maximum Operating Speeds
EM78P458
Vdd
HXT
LXT
EM78P458 EM78P459
External RC Oscillator Mode
EM78P458 EM78P459 Vcc Rext
RC Oscillator Mode with Internal Capacitor
EM78P458 EM78P459 Rin
Power-on Considerations
External Power on Reset Circuit
Residue-Voltage Protection
Enwdt Clks PTB HLF RCT HLP
Code Option Register Word
Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bits
Bit 5 ~ Bit 0 ID5~ID0 Customer’s ID
List of the instruction set of EM78P458/459
Instruction Set
ADD A,R
TCC Input Timing CLKS=0
Timing Diagrams
Reset Timing CLK=0
AC Test Input/Output Waveform
Absolute Maximum Ratings
Crystal type, two clocks
Electrical Characteristics
AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0V
ComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to
IVR
DIP
Appendix
Package Types
OTP MCU