ELAN Home Systems EM78P458AP, EM78P459AK, EM78P459AM manual ADC Data Register ADDATA/RA, GCON/IOC90

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EM78P458/459

OTP ROM

0 = The Vref of the ADC is connected to Vdd (default value), and the P53/VREF pin carries out the function of P53;

1 = The Vref of the ADC is connected to P53/VREF.

• CE (Bit 6): Control bit used to enable comparator. 0 = Disable comparator

1 = Enable comparator

• COE (Bit 5): Set P57 as the output of the comparator 0 = the comparator acts as an OP if CE=1.

1 = act as a comparator if CE=1.

•IMS2~IMS0 (Bit 4 ~ Bit 2): ADC configuration definition bit.

•CKR1 and CKR0 (Bit 1 and Bit 0): The conversion time select.

00 = Fosc/4;

01 = Fosc/16;

10 = Fsco/64;

11 = The oscillator clock source of ADC is from WDT ring oscillator frequency. ( frequency=256/18ms≒14.2Khz)

1.3 GCON/IOC90

As shown in Fig. 12, OP1 and OP2, the gain amplifiers, are located in the middle of the analog input pins (ADC1 and ADC5) and the 8-1analog switch. The GCON register controls the gains.

Table 7 Table 7 Shows the Gains and the Operating Range of ADC.


BIT	7		6		5		4		3	2		1	0
SYMBOL	OP2E		OP1E		G22		G21		G20	G12		G11	G10
*Init_Value	0		0		0		0		0	0		0	0
Table 8 The Gains and the Operating Range of ADC

G10:G12/G20:G22		Gain			Range of Operating Voltage
000		1					0 ~ Vref
001		2				0 ~ (1/2)Vref
010		4				0 ~ (1/4)Vref
011		8				0 ~ (1/8)Vref
100		16				0 ~ (1/16)Vref
101		32				0 ~ (1/32)Vref

<Note> Vref can not be less than 3 volts.

2. ADC Data Register (ADDATA/RA)

This specification is subject to change without prior notice.

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07.01.2003 (V1.3)

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Contents BIT MICRO-CONTROLLER EM78P458/459Application Note EM78P458/459General Description Features EM78P458/459 PIN Assignment EM78P459 Pin Description Operational Registers Function DescriptionR0 Indirect Addressing Register R1 Time Clock /CounterProgram Counter Organization R4 RAM Select Register R3 Status RegisterR5 ~ R6 Port 5 ~ Port R7 ~ R8Data Memory Configuration RA Addata the converted value of ADC R9 Adcon Analog to Digital Control10. RB 11. RC13. RE Special Purpose RegistersRF Interrupt Status Register 15. R10 ~ R3FIOC50 ~ IOC60 I/O Port Control Register Control RegisterInte INT PAB PSR2 PSR1 PSR0 Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bitsIOC90 Gcon I/O Configuration & Control of ADC OP2E OP1EVrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 IOCB0 Pull-down Control Register Description of AD Configuration Control BitsBit4Bit2 IMS2IMS0 IMS2IMS0IOCD0 Pull-high Control Register IOCC0 Open-Drain Control RegisterIOCF0 Interrupt Mask Register IOCE0 WDT Control RegisterWdte EIS Cmpie PWM2IE PWM1IE Adie Exie Icie TciePWM2E PWM1E T2EN T1EN IOC51 PwmconCALI1 SIGN1 IOC81 PRD1 Period of PWM1Bit 5Bit 3 VOF12VOF10 Offset voltage bits CALI2 SIGN2Bit 5Bit 3 VOF22VOF20 Offset voltage bits IOCB1 PRD2 Period of PWM2TCC/WDT & Prescaler I/O Ports Block Diagram of TCC and WDTCcircuit of I/O Port and I/O Control Register for Port Circuit of I/O Port and I/O Control Register for P60~P67 Reset and Wake-up Function of Reset and Wake-upUsage of Port 6 Input Changed Wake-up/Interrupt Function Contw CLR R1 Status of T, and P of Status Register Status of RST, T and P being Affected by Events Values of RST, T, and P after Reset Interrupt Interrupt Input Circuit Analog-To-Digital Converter ADCBIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 BIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0ADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90 ADCON/R9CKR1 and CKR0 Bit 1 and Bit 0 The conversion time select ADC Data Register ADDATA/RAGCON/IOC90 Shows the Gains and the Operating Range of ADCD Sampling Time D Operation During Sleep ModeD Conversion Time Programming Steps/ConsiderationsCINT== 0XF Demonstration ProgramsIocs Adrun Adpd ADIS2 ADIS1 ADIS0 Overview Dual Sets of PWM Pulse Width ModulationFunctional Block Diagram of the Dual PWMs Increment Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2LPWM Period Prdx PRD1 or PRD2 PWM Programming Procedures/StepsComparator Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale valueFunction description TimerTMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L Prdx PRD1 and PRD2 PWM period registerExternal Reference Signal Timer programming procedures/stepsComparator Programming the Related RegistersUsing as An Operation Amplifier Wake-up from Sleep ModeInterrupt Summary of the Initialized Values for Registers Initialized Values after ResetCALI1 SIGN1 Oscillator Modes OscillatorSummary of Maximum Operating Speeds Crystal Oscillator/Ceramic Resonators XtalEM78P458 EM78P459LXT HXTEM78P458 EM78P459 VddExternal RC Oscillator Mode EM78P458 EM78P459 Vcc Rext RC Oscillator Mode with Internal CapacitorExternal Power on Reset Circuit Power-on ConsiderationsResidue-Voltage Protection EM78P458 EM78P459 RinEnwdt Clks PTB HLF RCT HLP Code Option Register WordBit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bits Bit 5 ~ Bit 0 ID5~ID0 Customer’s IDList of the instruction set of EM78P458/459 Instruction SetADD A,R Reset Timing CLK=0 Timing DiagramsAC Test Input/Output Waveform TCC Input Timing CLKS=0Absolute Maximum Ratings Crystal type, two clocks Electrical CharacteristicsAC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0V ComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 toIVR Package Types AppendixOTP MCU DIP