ELAN Home Systems EM78P459AK, EM78P459AM, EM78P458AM manual Bit 5 ~ Bit 0 ID5~ID0 Customer’s ID

Page 52

EM78P458/459

OTP ROM

1:XTAL type

Bit 11 (/ENWTD): Watchdog timer enable bit.

0:Enable

1:Disable

Bit 10 (CLKS): Clocks of each instruction cycle.

0:Two clocks

1:Four clocks

Refer to the section of Instruction Set.

Bit 9 (/PTB): Protect bit.

0:

Enable

1:

Disable

Bit 8 (HLF): XTAL frequency selection. 0: Low frequency

1: High frequency

Bit 7 (RCT): Resistor Capacitor

0: Inter C, External R

1: External RC

Bit 6 (HLP): Power consumption selection. 0: Low power.

1: High power.

Bit 5 ~ Bit 0 (ID[5]~ID[0]): Customer’s ID.

2. Code Option Register (Word 1)

 

Bit12

 

Bit11

Bit10

Bit9

 

Bit8

 

Bit7

Bit6

Bit5

Bit4~Bit0

 

 

SIGN2

VOF2[2]

VOF2[1]

VOF2[0]

 

SIGN1

 

VOF1[2]

VOF1[1]

VOF1[0]

-

 

 

Bit 12 (SIGN2): Polarity bit of offset voltage.

 

 

 

 

 

 

0: Negative voltage

 

 

 

 

 

 

 

 

 

 

 

1: Positive voltage

 

 

 

 

 

 

 

 

 

 

 

Bit 11 ~ Bit 9 (VOF2[2]~VOF2[0]): Offset voltage bits

 

 

 

 

 

 

Bit 8

(SIGN1): Polarity bit of offset voltage.

 

 

 

 

 

 

 

 

0: Negative voltage

 

 

 

 

 

 

 

 

 

 

 

1: Positive voltage

 

 

 

 

 

 

 

 

 

 

 

Bit 7

~ Bit 5 (VOF1[2]~VOF210)): Offset voltage bits

 

 

 

 

 

 

Bit 4

~ Bit 0 : Not used.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This specification is subject to change without prior notice.

52

 

 

 

07.01.2003 (V1.3)

 

Image 52
Contents EM78P458/459 BIT MICRO-CONTROLLEREM78P458/459 Application NoteGeneral Description Features EM78P458/459 PIN Assignment EM78P459 Pin Description Function Description Operational RegistersR0 Indirect Addressing Register R1 Time Clock /CounterProgram Counter Organization R3 Status Register R4 RAM Select RegisterR5 ~ R6 Port 5 ~ Port R7 ~ R8Data Memory Configuration R9 Adcon Analog to Digital Control RA Addata the converted value of ADC10. RB 11. RCSpecial Purpose Registers 13. RERF Interrupt Status Register 15. R10 ~ R3FControl Register IOC50 ~ IOC60 I/O Port Control RegisterInte INT PAB PSR2 PSR1 PSR0 Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bitsOP2E OP1E IOC90 Gcon I/O Configuration & Control of ADCVrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 Description of AD Configuration Control Bits IOCB0 Pull-down Control RegisterBit4Bit2 IMS2IMS0 IMS2IMS0IOCC0 Open-Drain Control Register IOCD0 Pull-high Control RegisterIOCE0 WDT Control Register IOCF0 Interrupt Mask RegisterWdte EIS Cmpie PWM2IE PWM1IE Adie Exie Icie TcieIOC51 Pwmcon PWM2E PWM1E T2EN T1ENIOC81 PRD1 Period of PWM1 CALI1 SIGN1Bit 5Bit 3 VOF12VOF10 Offset voltage bits CALI2 SIGN2IOCB1 PRD2 Period of PWM2 Bit 5Bit 3 VOF22VOF20 Offset voltage bitsTCC/WDT & Prescaler Block Diagram of TCC and WDT I/O PortsCcircuit of I/O Port and I/O Control Register for Port Circuit of I/O Port and I/O Control Register for P60~P67 Function of Reset and Wake-up Reset and Wake-upUsage of Port 6 Input Changed Wake-up/Interrupt Function Contw CLR R1 Status of T, and P of Status Register Values of RST, T, and P after Reset Status of RST, T and P being Affected by EventsInterrupt Analog-To-Digital Converter ADC Interrupt Input CircuitBIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0 BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0ADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90 ADCON/R9ADC Data Register ADDATA/RA CKR1 and CKR0 Bit 1 and Bit 0 The conversion time selectGCON/IOC90 Shows the Gains and the Operating Range of ADCD Operation During Sleep Mode D Sampling TimeD Conversion Time Programming Steps/ConsiderationsDemonstration Programs CINT== 0XFIocs Adrun Adpd ADIS2 ADIS1 ADIS0 Dual Sets of PWM Pulse Width Modulation OverviewIncrement Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L Functional Block Diagram of the Dual PWMsPWM Programming Procedures/Steps PWM Period Prdx PRD1 or PRD2Comparator Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale valueTimer Function descriptionTMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L Prdx PRD1 and PRD2 PWM period registerTimer programming procedures/steps External Reference SignalComparator Programming the Related RegistersWake-up from Sleep Mode Using as An Operation AmplifierInterrupt Initialized Values after Reset Summary of the Initialized Values for RegistersCALI1 SIGN1 Oscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Xtal Summary of Maximum Operating SpeedsEM78P458 EM78P459HXT LXTEM78P458 EM78P459 VddExternal RC Oscillator Mode RC Oscillator Mode with Internal Capacitor EM78P458 EM78P459 Vcc RextPower-on Considerations External Power on Reset CircuitResidue-Voltage Protection EM78P458 EM78P459 RinCode Option Register Word Enwdt Clks PTB HLF RCT HLPBit 5 ~ Bit 0 ID5~ID0 Customer’s ID Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bitsInstruction Set List of the instruction set of EM78P458/459ADD A,R Timing Diagrams Reset Timing CLK=0AC Test Input/Output Waveform TCC Input Timing CLKS=0Absolute Maximum Ratings Electrical Characteristics Crystal type, two clocksComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0VIVR Appendix Package TypesOTP MCU DIP