Page 58
EM78P458/459
OTP ROM
6.2AC Electrical Characteristic(Ta=0°C ~ 70 °C, VDD=5V±5%, VSS=0V)
Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
| | | | | | |
Dclk | Input CLK duty cycle | | 45 | 50 | 55 | % |
Tins | Instruction cycle time | Crystal type | 100 | | DC | ns |
(CLKS="0") | RC type | 500 | | DC | ns |
| |
Ttcc | TCC input period | | (Tins+20)/N* | | | ns |
Tdrh | Device reset hold time | Ta = 25°C | 9 | 18 | 30 | ms |
Trst | /RESET pulse width | Ta = 25°C | 2000 | | | ns |
Twdt | Watchdog timer period | Ta = 25°C | 9 | 18 | 30 | ms |
Tset | Input pin setup time | | | 0 | | ms |
Thold | Input pin hold time | | | 20 | | ms |
Tdelay | Output pin delay time | Cload=20pF | | 50 | | ms |
*N= selected prescaler ratio.
6.3A/D Converter Characteristic(Vdd=3.0V to 5.5V,Vss=0V,Ta=0 to 70℃)
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Unit |
| VAREF | Analog reference voltage | VAREF - VASS≧2.5V | 3.0 | | Vdd | V |
| VASS | | | Vss | V |
| | | | |
| VAI | Analog input voltage | | VASS | | VAREF | V |
| IAI | Analog supply current | Vdd=VAREF=5.0V, VASS =0.0V | 500 | 700 | 1000 | uA |
| RN | Resolution | Vdd=VAREF=5.0V, VASS =0.0V | 6 | 7 | 8 | Bits |
| LN | Linearity error | Vdd = 2.5 to 5.5V Ta=25℃ | 0 | ±2 | ±4 | LSB |
| DNL | Differential nonlinear error | Vdd = 2.5 to 5.5V Ta=25℃ | 0 | ±0.5 | ±0.9 | LSB |
| FSE | Full scale error | Vdd=VAREF=5.0V, VASS =0.0V | ±0 | ±2 | ±4 | LSB |
| OE | Offset error | Vdd=VAREF=5.0V, VASS =0.0V | ±0 | ±1 | ±2 | LSB |
| ZAI | Recommended impedance of | | 0 | 8 | 10 | KΩ |
| analog voltage source | |
| | | | | | |
| TAD | A/D clock period | Vdd=VAREF=5.0V, VASS =0.0V | 3 | 3.5 | 4 | us |
| TCN | A/D conversion time | Vdd=VAREF=5.0V, VASS =0.0V | 10 | | 10 | TAD |
| ADIV | A/D OP input voltage range | Vdd=VAREF=5.0V, VASS =0.0V | 0 | | 5 | V |
| ADOV | A/D OP output voltage swing | Vdd=VAREF=5.0V, VASS | 0 | 0.2 | 0.3 | V |
| =0.0V,RL=10KΩ | 4.7 | 4.8 | 5 |
| | | |
| ADSR | A/D OP slew rate | Vdd=VAREF=5.0V, VASS =0.0V | 0.1 | 0.3 | | V/us |
| PSR | Power Supply Rejection | Vdd=5.0V±0.5V | ±0 | | ±2 | LSB |
Note: 1.These parameters are characterized but not tested.
2.These parameters are for design guidance only and are not tested.
3.It will not consume any current other than minor leakage current, when A/D is off.
4.The A/D conversion result never decrease with an increase in the input voltage, and has no missing code.
5.Specifications subject to change without notice.
6.4 Comparator(OP) Characteristic(Vdd = 5.0V,Vss=0V,Ta=0 to 70℃)
| Symbol | Parameter | | Condition | Min. | Typ. | Max. | Unit | |
| SR | Slew rate | | | 0.1 | 0.2 | | V/us | |
| | | | | |
This specification is subject to change without prior notice. | 58 | | | 07.01.2003 (V1.3) | |
Contents
EM78P458/459
BIT MICRO-CONTROLLER
EM78P458/459
Application Note
General Description
Features
EM78P458/459
PIN Assignment
EM78P459 Pin Description
R0 Indirect Addressing Register
Function Description
Operational Registers
R1 Time Clock /Counter
Program Counter Organization
R5 ~ R6 Port 5 ~ Port
R3 Status Register
R4 RAM Select Register
R7 ~ R8
Data Memory Configuration
10. RB
R9 Adcon Analog to Digital Control
RA Addata the converted value of ADC
11. RC
RF Interrupt Status Register
Special Purpose Registers
13. RE
15. R10 ~ R3F
Inte INT PAB PSR2 PSR1 PSR0
Control Register
IOC50 ~ IOC60 I/O Port Control Register
Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bits
OP2E OP1E
IOC90 Gcon I/O Configuration & Control of ADC
Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0
Bit4Bit2 IMS2IMS0
Description of AD Configuration Control Bits
IOCB0 Pull-down Control Register
IMS2IMS0
IOCC0 Open-Drain Control Register
IOCD0 Pull-high Control Register
Wdte EIS
IOCE0 WDT Control Register
IOCF0 Interrupt Mask Register
Cmpie PWM2IE PWM1IE Adie Exie Icie Tcie
IOC51 Pwmcon
PWM2E PWM1E T2EN T1EN
Bit 5Bit 3 VOF12VOF10 Offset voltage bits
IOC81 PRD1 Period of PWM1
CALI1 SIGN1
CALI2 SIGN2
IOCB1 PRD2 Period of PWM2
Bit 5Bit 3 VOF22VOF20 Offset voltage bits
TCC/WDT & Prescaler
Block Diagram of TCC and WDT
I/O Ports
Ccircuit of I/O Port and I/O Control Register for Port
Circuit of I/O Port and I/O Control Register for P60~P67
Function of Reset and Wake-up
Reset and Wake-up
Usage of Port 6 Input Changed Wake-up/Interrupt Function
Contw CLR R1
Status of T, and P of Status Register
Values of RST, T, and P after Reset
Status of RST, T and P being Affected by Events
Interrupt
Analog-To-Digital Converter ADC
Interrupt Input Circuit
ADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90
BIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0
BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0
ADCON/R9
GCON/IOC90
ADC Data Register ADDATA/RA
CKR1 and CKR0 Bit 1 and Bit 0 The conversion time select
Shows the Gains and the Operating Range of ADC
D Conversion Time
D Operation During Sleep Mode
D Sampling Time
Programming Steps/Considerations
Demonstration Programs
CINT== 0XF
Iocs Adrun Adpd ADIS2 ADIS1 ADIS0
Dual Sets of PWM Pulse Width Modulation
Overview
Increment Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L
Functional Block Diagram of the Dual PWMs
Comparator
PWM Programming Procedures/Steps
PWM Period Prdx PRD1 or PRD2
Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale value
TMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L
Timer
Function description
Prdx PRD1 and PRD2 PWM period register
Comparator
Timer programming procedures/steps
External Reference Signal
Programming the Related Registers
Wake-up from Sleep Mode
Using as An Operation Amplifier
Interrupt
Initialized Values after Reset
Summary of the Initialized Values for Registers
CALI1 SIGN1
Oscillator
Oscillator Modes
EM78P458
Crystal Oscillator/Ceramic Resonators Xtal
Summary of Maximum Operating Speeds
EM78P459
EM78P458 EM78P459
HXT
LXT
Vdd
External RC Oscillator Mode
RC Oscillator Mode with Internal Capacitor
EM78P458 EM78P459 Vcc Rext
Residue-Voltage Protection
Power-on Considerations
External Power on Reset Circuit
EM78P458 EM78P459 Rin
Code Option Register Word
Enwdt Clks PTB HLF RCT HLP
Bit 5 ~ Bit 0 ID5~ID0 Customer’s ID
Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bits
Instruction Set
List of the instruction set of EM78P458/459
ADD A,R
AC Test Input/Output Waveform
Timing Diagrams
Reset Timing CLK=0
TCC Input Timing CLKS=0
Absolute Maximum Ratings
Electrical Characteristics
Crystal type, two clocks
ComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to
AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0V
IVR
OTP MCU
Appendix
Package Types
DIP