Texas Instruments TMS320DM646X DMSOC Meeting AC Timing Requirements for Asram, Read Cycle time

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3.1.2Meeting AC Timing Requirements for ASRAM

When configuring the EMIF to interface to ASRAM, you must consider the AC timing requirements of the ASRAM as well as the AC timing requirements of the EMIF. These can be found in the data sheet for each respective device. The read and write asynchronous cycles are programmed separately in the asynchronous configuration register (ACFGn).

For a read access, Table 15 to Table 17 list the AC timing specifications that must be considered.

	Table 15. EMIF Input Timing Requirements
Parameter	Description
tSU	Data Setup time, data valid before				high
			EM_OE
tH	Data Hold time, data valid after			high
		EM_OE

	Table 16. ASRAM Output Timing Characteristics
Parameter	Description
tACC	Address Access time
tOH	Output data Hold time for address change
tCOD	Output Disable time from chip enable

	Table 17. ASRAM Input Timing Requirement for a Read
Parameter	Description
tRC	Read Cycle time

Figure 12 shows an asynchronous read access and describes how the EMIF and ASRAM AC timing requirements work together to define the values for R_SETUP, R_STROBE, and R_HOLD.

From Figure 12, the following equations may be derived. tcyc is the period at which the EMIF operates. The R_SETUP, R_STROBE, and R_HOLD fields are programmed in terms of EMIF cycles where as the data sheet specifications are typically given in nano seconds. This explains the presence of tcyc in the denominator of the following equations. A minus 1 is included in the equations because each field in ACFGn is programmed in terms of EMIF clock cycles, minus 1 cycle. For example, R_SETUP is equal to R_SETUP width in EMIF clock cycles minus 1 cycle.

R_SETUP ) R_STROBE w ￿tACC(m) ) tSU￿ * 1

tcyc

R_SETUP ) R_STROBE ) R_HOLD w tRC(m) * 3

tcyc

R_HOLD w ￿tH * tOH(m)￿ * 1

tcyc

The EMIF offers an additional parameter, TA, that defines the turnaround time between read and write cycles. This parameter protects against the situation when the output turn-off time of the memory is longer than the time it takes to start the next write cycle. If this is the case, the EMIF will drive data at the same time as the memory, causing contention on the bus. By examining Figure 12, the equation for TA can be derived as:

TA w tCOD(m) * 1

tcyc

SPRUEQ7C –February 2010	Asynchronous External Memory Interface (EMIF)	31
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