Texas Instruments TMS320DM646X DMSOC manual List of Tables

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	List of Tables
1	EMIF Pins	10
2	Behavior of EM_CS Signal Between Normal Mode and Select Strobe Mode	10
3	Description of the Asynchronous Configuration Register (ACFGn)	12
4	Description of the Asynchronous Wait Cycle Configuration Register (AWCCR)	13
5	Description of the EMIF Interrupt Mask Set Register (EIMSR)	13
6	Description of the EMIF Interrupt Mast Clear Register (EIMCR)	13
7	Asynchronous Read Operation in Normal Mode	14
8	Asynchronous Write Operation in Normal Mode	16
9	Asynchronous Read Operation in Select Strobe Mode	18
10	Asynchronous Write Operation in Select Strobe Mode	20
11	Description of the NAND Flash Control Register (NANDFCR)	22
12	Configuration For NAND Flash	22
13	EMIF Interrupt	28
14	Interrupt Monitor and Control Bit Fields	28
15	EMIF Input Timing Requirements	31
16	ASRAM Output Timing Characteristics	31
17	ASRAM Input Timing Requirement for a Read	31
18	ASRAM Input Timing Requirements for a Write	32
19	ASRAM Timing Requirements With PCB Delays	34
20	EMIF Timing Requirements for TC5516100FT-12 Example	37
21	ASRAM Timing Requirements for TC5516100FT-12 Example	37
22	Measured PCB Delays for TC5516100FT-12 Example	37
23	Configuring A2CR for TC5516100FT-12 Example	39
24	Recommended Margins	39
25	EMIF Read Timing Requirements	40
26	NAND Flash Read Timing Requirements	40
27	NAND Flash Write Timing Requirements	42
28	EMIF Timing Requirements for HY27UA081G1M Example	45
29	NAND Flash Timing Requirements for HY27UA081G1M Example	45
30	Configuring A1CR for HY27UA081G1M Example	47
31	Configuring NANDFCR for HY27UA081G1M Example	47
32	External Memory Interface (EMIF) Registers	48
33	Revision Code and Status Register (RCSR) Field Descriptions	49
34	Asynchronous Wait Cycle Configuration Register (AWCCR) Field Descriptions	50
35	Asynchronous n Configuration Register (ACFGn) Field Descriptions	52
36	EMIF Interrupt Raw Register (EIRR) Field Descriptions	53
37	EMIF Interrupt Mask Register (EIMR) Field Descriptions	54
38	EMIF Interrupt Mask Set Register (EIMSR) Field Descriptions	56
39	EMIF Interrupt Mask Clear Register (EIMCR) Field Descriptions	58
40	NAND Flash Control Register (NANDFCR) Field Descriptions	60
41	NAND Flash Status Register (NANDFSR) Field Descriptions	61
42	NAND Flash n ECC Register (NANDECCn) Field Descriptions	62
43	Document Revision History	63

SPRUEQ7C –February 2010	List of Tables	5
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