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Figure 12. Timing Waveform of an ASRAM Read

Setup

Strobe

Hold

EM_CS

tRC(m)

EM_A[21:0]

EM_BA[1:0]

EM_OE

tSU

tACC(m)

tCOD(m)

tOH(m) tH

EM_D[15:0]

For a write access, Table 18 lists the AC timing specifications that must be satisfied.

 

Table 18. ASRAM Input Timing Requirements for a Write

 

 

Parameter

Description

 

 

tWP

Write Pulse width

tAW

Address valid to end of Write

tDS

Data Setup time

tWR

Write Recovery time

tDH

Data Hold time

tWC

Write Cycle time

32

Asynchronous External Memory Interface (EMIF)

SPRUEQ7C –February 2010

 

 

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Texas Instruments TMS320DM646X DMSOC manual Timing Waveform of an Asram Read, Asram Input Timing Requirements for a Write