ELAN Home Systems EM78P458 R3 Status Register, R4 RAM Select Register, R5 ~ R6 Port 5 ~ Port

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EM78P458/459

OTP ROM

4. R3 (Status Register)

7	6	5	4		3	2	1	0
CMPOUT	PS1	PS0	T		P	Z	DC	C
• Bit 7 (CMPOUT) the result of the comparator output.

• Bit 6 (PS1) ~ 5 (PS0) Page select bits. PS0~PS1 are used to select a program memory page. When executing a "JMP", "CALL", or other instructions which cause the program counter to be changed (e.g. MOV R2, A), PS0~PS1 are loaded into the 11th and 12th bits of the program counter where it selects one of the available program memory pages. Note that RET (RETL, RETI) instruction does not change the PS0~PS1 bits. That is, the return will always be to the page from the place where the

subroutine was called, regardless of the current setting of PS0~PS1 bits.

PS1	PS0	Program memory page [Address]
0	0	Page 0 [000-3FF]
0	1	Page 1 [400-7FF]
1	0	Page 2 [800-BFF]
1	1	Page 3 [C00-FFF]

• Bit 4 (T) Time-out bit. Set to 1 by the "SLEP" and "WDTC" commands, or during Power on and reset to 0 by WDT time-out.

• Bit 3 (P) Power-down bit. Set to 1 during power-on or by a "WDTC" command and reset to 0 by a "SLEP" command.

• Bit 2 (Z) Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero.

• Bit 1 (DC) Auxiliary carry flag

• Bit 0 (C) Carry flag

5. R4 (RAM Select Register)

• Bits 0~5 are used to select registers (address: 00~3F) in the indirect address mode.

• Bit 6 is used to select bank 0 or bank 1.

• Bit 7 is a general-purpose read/write bit.

• See the configuration of the data memory in Fig. 4.

6. R5 ~ R6 (Port 5 ~ Port 6)

• R5 and R6 are I/O registers.

7. R7 ~ R8

• All of these are 8-bit general-purpose registers.

This specification is subject to change without prior notice.

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07.01.2003 (V1.3)

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Contents EM78P458/459 BIT MICRO-CONTROLLEREM78P458/459 Application NoteGeneral Description Features EM78P458/459 PIN Assignment EM78P459 Pin Description R0 Indirect Addressing Register Function DescriptionOperational Registers R1 Time Clock /CounterProgram Counter Organization R5 ~ R6 Port 5 ~ Port R3 Status RegisterR4 RAM Select Register R7 ~ R8Data Memory Configuration 10. RB R9 Adcon Analog to Digital ControlRA Addata the converted value of ADC 11. RCRF Interrupt Status Register Special Purpose Registers13. RE 15. R10 ~ R3FInte INT PAB PSR2 PSR1 PSR0 Control RegisterIOC50 ~ IOC60 I/O Port Control Register Bit 0 PSR0 ~ Bit 2 PSR2 TCC/WDT prescaler bitsOP2E OP1E IOC90 Gcon I/O Configuration & Control of ADCVrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 Bit4Bit2 IMS2IMS0 Description of AD Configuration Control BitsIOCB0 Pull-down Control Register IMS2IMS0IOCC0 Open-Drain Control Register IOCD0 Pull-high Control RegisterWdte EIS IOCE0 WDT Control RegisterIOCF0 Interrupt Mask Register Cmpie PWM2IE PWM1IE Adie Exie Icie TcieIOC51 Pwmcon PWM2E PWM1E T2EN T1ENBit 5Bit 3 VOF12VOF10 Offset voltage bits IOC81 PRD1 Period of PWM1CALI1 SIGN1 CALI2 SIGN2IOCB1 PRD2 Period of PWM2 Bit 5Bit 3 VOF22VOF20 Offset voltage bitsTCC/WDT & Prescaler Block Diagram of TCC and WDT I/O PortsCcircuit of I/O Port and I/O Control Register for Port Circuit of I/O Port and I/O Control Register for P60~P67 Function of Reset and Wake-up Reset and Wake-upUsage of Port 6 Input Changed Wake-up/Interrupt Function Contw CLR R1 Status of T, and P of Status Register Values of RST, T, and P after Reset Status of RST, T and P being Affected by EventsInterrupt Analog-To-Digital Converter ADC Interrupt Input CircuitADC Control Register ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90 BIT Symbol Iocs Adrun Adpd ADIS2 ADIS1 ADIS0BIT Symbol Vrefs COE IMS2 IMS1 IMS0 CKR1 CKR0 ADCON/R9GCON/IOC90 ADC Data Register ADDATA/RACKR1 and CKR0 Bit 1 and Bit 0 The conversion time select Shows the Gains and the Operating Range of ADCD Conversion Time D Operation During Sleep ModeD Sampling Time Programming Steps/ConsiderationsDemonstration Programs CINT== 0XFIocs Adrun Adpd ADIS2 ADIS1 ADIS0 Dual Sets of PWM Pulse Width Modulation OverviewIncrement Timer Counter Tmrx TMR1H/TWR1L or TMR2H/TWR2L Functional Block Diagram of the Dual PWMsComparator PWM Programming Procedures/StepsPWM Period Prdx PRD1 or PRD2 Period = Prdx + 1 * 4 * 1/Fosc * Tmrx prescale valueTMR1X and TMR2X TMR1H/TWR1L and TMR2H/TMR2L TimerFunction description Prdx PRD1 and PRD2 PWM period registerComparator Timer programming procedures/stepsExternal Reference Signal Programming the Related RegistersWake-up from Sleep Mode Using as An Operation AmplifierInterrupt Initialized Values after Reset Summary of the Initialized Values for RegistersCALI1 SIGN1 Oscillator Oscillator ModesEM78P458 Crystal Oscillator/Ceramic Resonators XtalSummary of Maximum Operating Speeds EM78P459EM78P458 EM78P459 HXTLXT VddExternal RC Oscillator Mode RC Oscillator Mode with Internal Capacitor EM78P458 EM78P459 Vcc RextResidue-Voltage Protection Power-on ConsiderationsExternal Power on Reset Circuit EM78P458 EM78P459 RinCode Option Register Word Enwdt Clks PTB HLF RCT HLPBit 5 ~ Bit 0 ID5~ID0 Customer’s ID Bit 11 ~ Bit 9 VOF22~VOF20 Offset voltage bitsInstruction Set List of the instruction set of EM78P458/459ADD A,R AC Test Input/Output Waveform Timing DiagramsReset Timing CLK=0 TCC Input Timing CLKS=0Absolute Maximum Ratings Electrical Characteristics Crystal type, two clocksComparatorOP CharacteristicVdd = 5.0V,Vss=0V,Ta=0 to AC Electrical CharacteristicTa=0C ~ 70 C, VDD=5V±5%, VSS=0VIVR OTP MCU AppendixPackage Types DIP