Nortel Networks MSC8101 ADS user manual Clkx, Damage to the PM5350 ATM UNI

Page 80

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

TABLE B1-2. P1 - System Expansion - Interconnect Signals

Pin No.

Signal Name

Attribute

Description

 

 

 

 

 

 

 

 

B21

V3.3

P

3.3V Power Out. These lines are connected to the main 3.3V

 

 

 

plane of the MSC8101ADS, this, to provide 3.3V power where

B22

 

 

 

 

necessary for external tool connected. The amount of current

 

 

 

allowed to be drawn from this power bus is found in TABLE 7-1.

B23

 

 

 

 

"Off-Board Application Maximum Current Consumption" on

 

 

 

B24

 

 

page 66.

 

 

 

 

B25

N.C.

-

Not Connected

 

 

 

 

B26

5V0

P

5V Supply. Connected to ADS’s 5V plane. Provided as power

 

 

 

supply for external tool. For allowed current draw, see TABLE 7-

B27

 

 

 

 

1. "Off-Board Application Maximum Current Consumption"

 

 

 

on page 66.

B28

 

 

 

 

 

 

 

 

 

B29

 

 

 

 

 

 

 

B30

 

 

 

 

 

 

 

B31

 

 

 

 

 

 

 

B32

 

 

 

 

 

 

 

 

 

 

 

C1

GND

P

Digital Ground. Connected to main GND plane of the ADS.

 

 

 

 

C2

CLKX

O

Buffered System Clock. This is a low skew buffered version of the

 

 

 

MSC8101’s CLKOUT signal, to be used by an external tool.

 

 

 

 

C3

GND

P

Digital Ground. Connected to main GND plane of the ADS.

 

 

 

 

C4

BTOLCS1b

O

Buffered Tool Chip Select 1. This is a buffered MSC8101’s CS6~

 

 

 

line, reserved for an external tool.

 

 

 

 

C5

BTOLCS2b

O

Buffered Tool Chip Select 2. This is a buffered MSC8101’s CS7~

 

 

 

line, reserved for an external tool.

 

 

 

 

C6

GND

P

Digital Ground. Connected to main GND plane of the ADS.

 

 

 

 

C7

ATMENb

O

ATM Port Enable. This line enables the ATM port UNI’s output

 

 

 

lines towards the MSC8101. An external tool, using the same pins

 

 

 

as does the ATM port should consult this signal before driving the

 

 

 

same lines. Failure to do so might result in permanent

 

 

 

damage to the PM5350 ATM UNI.

 

 

 

 

C8

ATMRSTb

O

ATM Port Reset.This signal resets the ATM UNI (PM5350). An

 

 

 

external tool may use this signal to its benefit.

 

 

 

 

C9

FETHRSTb

O

Ethernet Port Reset (L). This signal resets the LXT970 Ethernet

 

 

 

transceiver. An external tool may use this signal to its benefit.

 

 

 

 

C10

HRESETb

I/O, O.D.

MSC8101’s Hard Reset. When asserted by an external H/W,

 

 

 

generates Hard-Reset sequence for the MSC8101. During that

 

 

 

sequence, asserted by the MSC8101 for 512 system clocks.

 

 

 

Pulled Up on the ADS using a 1KΩ resistor.

 

 

 

When driven by an external tool, MUST be driven with an Open

 

 

 

Drain gate. Failure to do so might result in permanent

 

 

 

damage to the MSC8101 and / or to ADS logic.

 

 

 

 

MOTOROLA

MSC8101ADS RevB User’s Manual

B-79

For More Information On This Product,

Go to: www.freescale.com

Page 79 Page 81
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Page 79 Page 81
Contents MSC8101 ADS MSC8101ADS RevB User’s Manual Contents ATM on LD14 BOM Freescale Semiconductor, Inc List of Figures Viii List of Tables Freescale Semiconductor, Inc Related Documentation IntroductionAbbreviations’ List Characteristics Specifications SpecificationMSC8101ADS Specifications ADS Features Freescale Semiconductor, Inc Semiconductor, Inc Hardware Preparation MSC8101ADS Top Side Part Location diagram Setting HReset Configuration Source Setting The Core Supply Voltage LevelSetting MODCK13 For Initial PLLs’ Multiplication Factor SW9 OnCE Connection Scheme Host I/F OperationStand Alone Operation Host System Debug Scheme B34 +5V Power Supply Connection JTAG/OnCE Connector P6Host I/F Connector P4 P6 JTAG/OnCE Port ConnectorP4 Host I/F Connector Terminal to MSC8101ADS RS-232 ConnectionFlash Memory Simm Installation 38 10/100-Base-T Ethernet Port ConnectionFlash Memory Simm Insertion Host I/F Setting SW1 Emulator Enable EE SW2Data Bus Width Setting SW5 & SW6 Abort Switch SW3Soft Reset Sreset Switch SW4 Configuration Switch SW9 Hard Reset Hreset Switch SW7Power-On Reset Switch Preset SW8 Available Clock Mode Setting Boot Mode Select SW10Modck CPMSoftware Options Switch SW11 431 JP1 DLL DisableJumpers 432 JP2 Clock Buffer Set433 JP3 50 Ohm Enable 436 JP6,JP7 MIC Enable437 JP9 5V power supply for Codec 434 JP4 VPP Source SelectorLEDs Ethernet Link Indicator LD4 Fast Ethernet Clsn Indicator LD5ATM RX Indicator LD6 ATM TX Indicator LD7MSC8101’s Registers’ Programming Memory Controller Registers Programming SIU Registers’ ProgrammingSystem Initialization Memory Controller Initialization for 10050a MHz Memory Controller Initialization for 10050a MHz Mbmr Reset & Reset Configuration Power- On ResetPower On Reset Configuration Manual Hard ResetSummary Reset Configuration Schemes Hard Reset Configuration WordManual Soft Reset IRQ2Local Interrupter Clock GeneratorBus Buffering Chip Select GeneratorSynchronous Dram Bank MSC8101ADS Chip Select Assignments Bus Timing MachineSdram MHz Sdram Mode Register ProgrammingSdram Programming Sdram Refresh Cycle Type \ Flash Delay nsecFlash Memory Simm Flash Simm Connection Scheme Flash Programming VoltageCommunication Ports Ports Function Enable MSC8101 I/O Ports/Name581 ATM Port 582 100/10 Base T Port5831 CS4221 Programming CS4221 ProgrammingAudio Codec 585 RS232 Ports CS4221 Programming584 T1/E1 Ports Host I/F Board Control & Status Register Bcsr Host I/F Interconnect signalsDMA off-board tool BCSR0 Description BCSR0 Board Control / Status RegisterBIT Mnemonic PON ATT DEF HostcspBCSR1 Board Control / Status Register BCSR0 Description10. BCSR1 Description 10. BCSR1 Description PON ATT DEF AtmrstFethien FethrstBCSR2 Board Control / Status Register 11. Peripheral’s Availability Decoding12. BCSR2 Description 12. BCSR2 Description 13. Flash Presence Detect 75 Encoding14. Flash Presence Detect 41 Encoding BCSR3 Board Status Register15. BCSR3 Description 16. EXTOOLI03 Assignment 17. External Tool Revision Encoding18. ADS Revision Encoding EngineeringPPC Bus Memory Map MSC8101ADS Memory Map MSC8101ADS Memory Map FE000000 FfffffffFF000000 Ffffffff FF800000 FfffffffPower rails ADS Power SchemeOff-Board Application Maximum Current Consumption 711 5V Bus712 3V Bus 713 5V BusAppendix a MSC8101 Bill of Material A1 BOM Table A-1. MSC8101ADS Bill Of MaterialFreescale Inc Inc Dale Freescale Semiconductor Freescale Semiconductor, Inc Appendix B Support Information Interconnect Signals B11Table B1-2. P1 System Expansion Interconnect Signals GND TSTAT0TSTAT1 TSTAT2 TSTAT3 TSTAT4 TSTAT5Clkx Damage to the PM5350 ATM UNIEXPD0 EXPD1EXPD2 EXPD3EXPCTL0 SCC1RXD PD30 Table B1-3. P2 CPM Expansion Interconnect SignalsB12 MSC8101ADS’s P2 CPM Expansion Connector SPICLKPD18 SPIMOSIPD17Hwrds PD7Atmtsoc PA29 Atmrsoc PA27Atmrfclk Atmrca PA26ATMRXD7 PA17 ATMRXD6 PA16ATMRXD5 PA15 ATMRXD4 PA14Fethtxen PB29 Fethrxer PB28Fethcol PB27 Fethcrs PB26HD0 HD1HD2 HD3Atmfclk PC26 Fethmdc PC13Fethmdio PC12 PC7PC6 SMCTX1PC5B13 Table B1-4. P3 ISP Connector Interconnect SignalsB14 P4 Host Interface Connector HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HA1 HA2 HA3 HCS1Hack HreqTable B1-6. P6 JTAG/ONCE Connector Interconnect Signals B15 P5, P7, P8, P9, P10, P13, P14 Logic Analyzer ConnectorsB16 HDSTable B1-7. P12 Ethernet Port Interconnect Signals B17 P12 Ethernet Port ConnectorB18 P15,P16 SMB Connectors B19 P17,P18 Double RJ45 T1/E1 Line ConnectorsB110 P19,P21,P24 Stereo Phone Jack Connectors B111 P20,P22,P23,P25 RCA Jack ConnectorsTable B1-10. P27A Interconnect Signals Table B1-11. P27B Interconnect SignalsB112 P26 5V Power Supply Connectors B113 P27A,B RS232 Ports’ ConnectorsFreescale Semiconductor, Inc Appendix C Program Information Freescale Semiconductor, Inc Logic Equations C11 First Include FileC12 Second Include file C13 Main File Constant SHIFTLENGTH= Length of HRD/HRW Delay Shifter SIZE0 Constant EE45HOLDVALUEConstant SIZE1 ConstantConstant TCPCDEFAULT0 Constant TCPCDEFAULT1 HDIMDEN~ Host SW Enable RSTCNF~ OutputSRESET~ HRESET~ BidirSBOOTENOUT~ SPARE1 OutputHDIEN~ HRRQEN~WDTIMER1 WDTIMER2WDTIMER3 WDTIMER4Eepromenable Resets CleartowdctrlBCSR1 SBOOTEN~ Scndcfgbyteread Thirdcfgbyteread FourthcfgbytereadBCSR3 IRQ0BCSR1PONDEF0..SIZE1 BCSR3PONDEF0..SIZE3BCSR0 BCSR0PONCONST0..5 Begin DefaultsEND Defaults END if END Generate EEDPONDEFAULT,RSV37PONDEFAULTElse EE Pins Regularpoweronreset = RPORI~ == RegularponresetactivePSDVAL~ = Opndrnvcc END ifIf Hdds then If !HDSP then Hdiwr =Else Hdiwr = END if ElseElsif MPCWRITEBCSR1 then Elsif MPCWRITEBCSR4 thenElsif MPCWRITEBCSR5 then Elsif MPCWRITEBCSR6 thenElsif MPCREADBCSR3 then SIGNALLAMP1~ Elsif MPCREADBCSR1 thenIf MPCREADBCSR0 then HRESET~ = SRESET~ =Elsif Firstcfgbyteread then Elsif Scndcfgbyteread thenThen SIGLAMP0OUT~ = GND Else Then SIGLAMP1OUT~Else SIGLAMP1OUT~ END if If !T1234EN~ & FETHIEN~ then116 MODCK1-3 Driven END if Drive Poreset Impulse Reconfig Using BCSR4Watchdog for Auto Reconfiguration 118
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