Nortel Networks MSC8101 ADS EXPD0, EXPD1, EXPD2, EXPD3, EXPD4, EXPD5, EXPD6, EXPD7, EXPD8, EXPD9

Page 81

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

TABLE B1-2. P1 - System Expansion - Interconnect Signals

 

Pin No.

Signal Name

Attribute

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C11

IRQ6b

I,P.U.

Interrupt Request 6 . Connected to MSC8101‘s DP6//IRQ6b/

 

 

 

 

 

DACK3 signal. Pulled up on the ADS with a 10 KΩ resistor. This

 

 

 

 

 

line is shared with the ATM UNI’s interrupt line and therefore,

 

 

 

 

 

when driven by an external tool, MUST be driven with an Open

 

 

 

 

 

Drain gate. Failure to do so may result in permanent damage

 

 

 

 

 

to the MSC8101 or to ADS logic.

 

 

 

 

 

 

 

 

C12

IRQ7b

I.P.U.

Interrupt Request 7 . Connected to MSC8101‘s DP7/IRQ7b/

 

 

 

 

 

DACK4 signal. Pulled up on the ADS with a 10 KΩ resistor. This

 

 

 

 

 

line is shared with the Fast Ethernet transceiver’s interrupt line

 

 

 

 

 

and therefore, when driven by an external tool, MUST be driven

 

 

 

 

 

with an Open Drain gate. Failure to do so might result in

 

 

 

 

 

permanent damage to the MSC8101 and / or to ADS logic.

 

 

 

 

 

 

 

 

C13

GND

P

Digital Ground. Connected to main GND plane of the ADS.

 

 

 

 

 

 

 

 

C14

EXPD0

I/O, T.S.

Expansion Data (0a:15). This is a double buffered version of the

 

 

 

 

 

PPC bus D(0:15) lines, controlled by on-board logic. These lines

 

 

C15

EXPD1

 

 

 

 

will be driven only if BTOLCS1b or BTOLCS2b are asserted.

 

 

 

 

 

Otherwise they are tristated.

 

 

C16

EXPD2

 

 

 

 

The direction of these lines is determined by buffered BCTL0, in

 

 

 

 

 

 

 

C17

EXPD3

 

function of R~/W.

 

 

 

 

 

 

 

 

C18

EXPD4

 

 

 

 

 

 

 

 

 

 

C19

EXPD5

 

 

 

 

 

 

 

 

 

 

C20

EXPD6

 

 

 

 

 

 

 

 

 

 

C21

EXPD7

 

 

 

 

 

 

 

 

 

 

C22

EXPD8

 

 

 

 

 

 

 

 

 

 

C23

EXPD9

 

 

 

 

 

 

 

 

 

 

C24

EXPD10

 

 

 

 

 

 

 

 

 

 

C25

EXPD11

 

 

 

 

 

 

 

 

 

 

C26

EXPD12

 

 

 

 

 

 

 

 

 

 

C27

EXPD13

 

 

 

 

 

 

 

 

 

 

C28

EXPD14

 

 

 

 

 

 

 

 

 

 

C29

EXPD15

 

 

 

 

 

 

 

 

 

 

C30

IRQ4b

I.P.U.

Interrupt Request 4. Connected to MSC8101‘s DP4/IRQ4b/

 

 

 

 

 

DREQ3 signal. Pulled up on the ADS with a 10 KΩ resistor. This

 

 

 

 

 

line is shared with the Fast Ethernet transceiver’s interrupt line

 

 

 

 

 

and therefore, when driven by an external tool, MUST be driven

 

 

 

 

 

with an Open Drain gate. Failure to do so might result in

 

 

 

 

 

permanent damage to the MSC8101 and / or to ADS logic.

 

 

 

 

 

 

 

 

C31

IRQ5b

I.P.U.

Interrupt Request 5. Connected to MSC8101‘s DP5/IRQ5b/

 

 

 

 

 

DREQ5 signal. Pulled up on the ADS with a 10 KΩ resistor. This

 

 

 

 

 

line is shared with the Fast Ethernet transceiver’s interrupt line

 

 

 

 

 

and therefore, when driven by an external tool, MUST be driven

 

 

 

 

 

with an Open Drain gate. Failure to do so might result in

 

 

 

 

 

permanent damage to the MSC8101 and / or to ADS logic.

 

 

 

 

 

 

 

 

 

 

 

 

 

B-80

MSC8101ADS RevB User’s Manual

MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

Page 80 Page 82
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Page 80 Page 82
Contents MSC8101 ADS MSC8101ADS RevB User’s Manual Contents ATM on LD14 BOM Freescale Semiconductor, Inc List of Figures Viii List of Tables Freescale Semiconductor, Inc Introduction Abbreviations’ ListRelated Documentation Specification MSC8101ADS SpecificationsCharacteristics Specifications ADS Features Freescale Semiconductor, Inc Semiconductor, Inc Hardware Preparation MSC8101ADS Top Side Part Location diagram Setting The Core Supply Voltage Level Setting MODCK13 For Initial PLLs’ Multiplication Factor SW9Setting HReset Configuration Source Host I/F Operation OnCE Connection SchemeHost System Debug Scheme B Stand Alone OperationJTAG/OnCE Connector P6 34 +5V Power Supply ConnectionP6 JTAG/OnCE Port Connector Host I/F Connector P4Terminal to MSC8101ADS RS-232 Connection P4 Host I/F Connector38 10/100-Base-T Ethernet Port Connection Flash Memory Simm InstallationFlash Memory Simm Insertion Emulator Enable EE SW2 Host I/F Setting SW1Abort Switch SW3 Soft Reset Sreset Switch SW4Data Bus Width Setting SW5 & SW6 Hard Reset Hreset Switch SW7 Power-On Reset Switch Preset SW8Configuration Switch SW9 Boot Mode Select SW10 Available Clock Mode SettingModck CPM431 JP1 DLL Disable Software Options Switch SW11Jumpers 432 JP2 Clock Buffer Set436 JP6,JP7 MIC Enable 433 JP3 50 Ohm Enable437 JP9 5V power supply for Codec 434 JP4 VPP Source SelectorLEDs Fast Ethernet Clsn Indicator LD5 Ethernet Link Indicator LD4ATM RX Indicator LD6 ATM TX Indicator LD7MSC8101’s Registers’ Programming SIU Registers’ Programming System InitializationMemory Controller Registers Programming Memory Controller Initialization for 10050a MHz Memory Controller Initialization for 10050a MHz Mbmr Power- On Reset Reset & Reset ConfigurationPower On Reset Configuration Manual Hard ResetHard Reset Configuration Word Summary Reset Configuration SchemesIRQ2 Manual Soft ResetClock Generator Local InterrupterChip Select Generator Bus BufferingMSC8101ADS Chip Select Assignments Bus Timing Machine Synchronous Dram BankMHz Sdram Mode Register Programming Sdram ProgrammingSdram Cycle Type \ Flash Delay nsec Flash Memory SimmSdram Refresh Flash Programming Voltage Flash Simm Connection SchemeCommunication Ports MSC8101 I/O Ports/Name Ports Function Enable582 100/10 Base T Port 581 ATM PortCS4221 Programming Audio Codec5831 CS4221 Programming CS4221 Programming 584 T1/E1 Ports585 RS232 Ports Host I/F Host I/F Interconnect signals DMA off-board toolBoard Control & Status Register Bcsr BCSR0 Board Control / Status Register BCSR0 DescriptionBIT Mnemonic PON ATT DEF HostcspBCSR0 Description 10. BCSR1 DescriptionBCSR1 Board Control / Status Register PON ATT DEF Atmrst 10. BCSR1 DescriptionFethien Fethrst11. Peripheral’s Availability Decoding 12. BCSR2 DescriptionBCSR2 Board Control / Status Register 13. Flash Presence Detect 75 Encoding 12. BCSR2 Description14. Flash Presence Detect 41 Encoding BCSR3 Board Status Register15. BCSR3 Description 17. External Tool Revision Encoding 16. EXTOOLI03 Assignment18. ADS Revision Encoding EngineeringPPC Bus Memory Map MSC8101ADS Memory Map FE000000 Ffffffff MSC8101ADS Memory MapFF000000 Ffffffff FF800000 FfffffffADS Power Scheme Power rails711 5V Bus Off-Board Application Maximum Current Consumption712 3V Bus 713 5V BusAppendix a MSC8101 Bill of Material Table A-1. MSC8101ADS Bill Of Material A1 BOMFreescale Inc Inc Dale Freescale Semiconductor Freescale Semiconductor, Inc Appendix B Support Information B11 Interconnect SignalsTable B1-2. P1 System Expansion Interconnect Signals TSTAT0 GNDTSTAT1 TSTAT2 TSTAT3 TSTAT4 TSTAT5Damage to the PM5350 ATM UNI ClkxEXPD1 EXPD0EXPD2 EXPD3EXPCTL0 Table B1-3. P2 CPM Expansion Interconnect Signals B12 MSC8101ADS’s P2 CPM Expansion ConnectorSCC1RXD PD30 SPIMOSIPD17 SPICLKPD18Hwrds PD7Atmrsoc PA27 Atmtsoc PA29Atmrfclk Atmrca PA26ATMRXD6 PA16 ATMRXD7 PA17ATMRXD5 PA15 ATMRXD4 PA14Fethrxer PB28 Fethtxen PB29Fethcol PB27 Fethcrs PB26HD1 HD0HD2 HD3Fethmdc PC13 Atmfclk PC26PC7 Fethmdio PC12PC6 SMCTX1PC5Table B1-4. P3 ISP Connector Interconnect Signals B14 P4 Host Interface ConnectorB13 HA1 HA2 HA3 HCS1 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9Hack HreqB15 P5, P7, P8, P9, P10, P13, P14 Logic Analyzer Connectors Table B1-6. P6 JTAG/ONCE Connector Interconnect SignalsB16 HDSB17 P12 Ethernet Port Connector Table B1-7. P12 Ethernet Port Interconnect SignalsB18 P15,P16 SMB Connectors B19 P17,P18 Double RJ45 T1/E1 Line ConnectorsB111 P20,P22,P23,P25 RCA Jack Connectors B110 P19,P21,P24 Stereo Phone Jack ConnectorsTable B1-11. P27B Interconnect Signals Table B1-10. P27A Interconnect SignalsB112 P26 5V Power Supply Connectors B113 P27A,B RS232 Ports’ ConnectorsFreescale Semiconductor, Inc Appendix C Program Information Freescale Semiconductor, Inc C11 First Include File Logic EquationsC12 Second Include file C13 Main File Constant EE45HOLDVALUE Constant SHIFTLENGTH= Length of HRD/HRW Delay Shifter SIZE0Constant SIZE1 ConstantHDIMDEN~ Host SW Enable RSTCNF~ Output Constant TCPCDEFAULT0 Constant TCPCDEFAULT1SRESET~ HRESET~ BidirSPARE1 Output SBOOTENOUT~HDIEN~ HRRQEN~WDTIMER2 WDTIMER1WDTIMER3 WDTIMER4Resets Cleartowdctrl EepromenableBCSR1 SBOOTEN~ Scndcfgbyteread Thirdcfgbyteread FourthcfgbytereadIRQ0 BCSR3BCSR1PONDEF0..SIZE1 BCSR3PONDEF0..SIZE3Begin Defaults END DefaultsBCSR0 BCSR0PONCONST0..5 EEDPONDEFAULT,RSV37PONDEFAULT ElseEND if END Generate Regularpoweronreset = RPORI~ == Regularponresetactive EE PinsPSDVAL~ = Opndrnvcc END ifIf !HDSP then Hdiwr = If Hdds thenElse Hdiwr = END if ElseElsif MPCWRITEBCSR4 then Elsif MPCWRITEBCSR1 thenElsif MPCWRITEBCSR5 then Elsif MPCWRITEBCSR6 thenSIGNALLAMP1~ Elsif MPCREADBCSR1 then If MPCREADBCSR0 thenElsif MPCREADBCSR3 then SRESET~ = HRESET~ =Elsif Firstcfgbyteread then Elsif Scndcfgbyteread thenThen SIGLAMP1OUT~ Then SIGLAMP0OUT~ = GND ElseElse SIGLAMP1OUT~ END if If !T1234EN~ & FETHIEN~ then116 END if Drive Poreset Impulse Reconfig Using BCSR4 Watchdog for Auto ReconfigurationMODCK1-3 Driven 118
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