Texas Instruments TLV1562 manual DSP Algorithm for Dual Continuous Mode

Conversation Between the TLV1562 and the DSP

7.6Dual Continuous Mode

The dual continuous mode provides a data stream of two input signals. The characteristic of the data protocol is similar to the mono continuous mode but with the use of two RD cycles for one sample/hold cycle.

CAUTION:

In this mode, the sampling result sent out by the ADC is the value of the sample from the last cycle. Therefore, the first sample after initialization is trash.

Table 11. DSP Algorithm for Dual Continuous Mode

Wait cycles for the DSP internally (40MHz DSPCLK):

STEPS

TIMING, NOTES

APD=0

APD=0

APD=1

APD=1

ADCSYCLK

ADCSYCLK

ADCSYCLK

ADCSYCLK

= 7.5 MHz

= 10 MHz

= 10 MHz

= 10 MHz

0.

Initialization

N/A

N/A

Write all configuration data to the

Activate the dual continuous mode in

N/A

N/A

ADC

CR0(2;3)

1.

Set

deselect ADC

N/A

N/A

CS

2.

Wait for t(SAMPLE1)

t(SAMPLE1) = 100 ns

≥

4

≥

4

N/A

N/A

3.

Clear

Select ADC

N/A

N/A

CS

4.

Clear

Start conversion

RD

5.

Wait the time tEN(DATAOUT)

tEN(DATAOUT) = 41 ns

≥

2

≥

2

N/A

N/A

6.

Read first sample out from the

(Caution: the first result after initialization

N/A

N/A

data port; reset

signal

is trash)

RD

7.

Wait for the time t(CONV1) minus

t(CONV1) = 5(6) ADCSysclk; since step 7

≥ 23

≥ 16

N/A

N/A

step 7 and 8 to ensure 5(6) ADC-

and 8 take at least 4 DSPSYSCLK, the

SYSCLk

calculation are 5(6)ADCSYSCLK minus

100 ns

8.

Clear

Start conversion

RD

9.

Wait the time tEN(DATAOUT)

tEN(DATAOUT) = 41 ns

≥

2

≥

2

N/A

N/A

10.

Read second sample out from the

(Caution: the first result after initialization

N/A

N/A

data port; reset

signal

is trash)

RD

11.

Wait for the time t(CONV1) minus

t(CONV1) = 5(6) ADCSysclk; since step 7

≥ 23

≥ 16

N/A

N/A

step 7 and 8 to ensure 5(6) ADC-

and 8 take at least 4 DSPSYSCLK, the

SYSCLk

calculation are 5(6)ADCSYSCLK minus

100ns

12.

Go to step 4 for more samples

N/A

N/A

Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 17