Texas Instruments TLV1562 manual The DSP Serial Port, DSP Serial Port Signals and Registers

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5 The DSP Serial Port

The DSP Serial Port

5 The DSP Serial Port

The buffered serial port provides direct communication with serial I/O devices and consists of six basic signals and five registers. The DSP internal serial port operation section discusses the registers.

The six signals are:

BCLKX - The serial transmit clock. This signal clocks the transmitted data from the BDX terminal to the DIN terminal of the TLC5618A.

BCLKR - The serial receive clock. This signal clocks data into the DSP BDR terminal. Since the DAC does not send any information back to the DSP, this signal is not important.

BDX - Data transmit. From this terminal the DSP transmits 16-bit data to the DIN terminal of the TLC5618A.

BDR - Data receive – not in use

BFSX - Frame sync transmit. This signal frames the transmit data. The DSP begins to transmit data from BDX on the falling edge of BFSX and continues to transmit data for the next 16 clock cycles from the BCLKX terminal. The BFSX signal is applied to the TLC5618A CS terminal.

BFSR - Frame sync receive. This signal frames the receive data. The DSP begins to receive data on the falling edge of BFSR and continues to recognize valid data for the following 16 clocks from BCLKR. This signal is not important for this application.

Table 5 lists the serial port pins and registers.

Table 5. DSP Serial Port Signals and Registers

PINS

DESCRIPTION

REGISTERS

DESCRIPTION

 

 

 

 

BCLKX

Transmit clock signal

BSPC

Serial port control register

 

 

 

 

BCLKR

Receive clock signal

BSPCE

extended BSPC

 

 

 

 

BDX

Transmitted serial data signal

BDXR

Data transmit register

 

 

 

 

BDR

Received serial data signal

BDRR

Data receive register

 

 

 

 

BFSX

Transmit frame synchronization signal

BXSR

Transmit shift register

 

 

 

 

BFSR

Receive frame synchronization signal

BRSR

Receive shift register

 

 

 

 

 

 

AXR

Buffer start location

 

 

 

 

 

 

BKX

Buffer size

For this application the DSP buffered serial port is programmed as the master, so the BCLKX output is fed to the BCLKR terminal and the BFSX output is fed to the BFSR terminal.

10SLAA040

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Contents July SLAA040Application Report TParalInteMS3rflelADConvertertotheacing20C54xDSPtheTLV1562IMPORTANT NOTICE Contents 8.5.5 List of Tables List of FiguresFigures viSLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 1 Introduction2 The Board 2.1 TMS320C54x Starter Kit2.2 TLV1562EVM 2.3 ADC TLV1562 Overview2.3.1 Suggestions for the ’C54x to TLV1562 Interface 2.3.1.1 The Universal Interface2.3.2 Recyclic Architecture Using RD or the CSTART Signal to Start ConversionFigure 2. TLV1562 to ’C54x DSP Interface of the EVM 2.4 Onboard Components 2.3.3 Note on the Interface, Using an External ADC Clock Drive2.4.1 TLC5618A - Serial DAC Figure 3. TLC5618A to ’C542 DSP Interface 2.4.2 THS5651 - Parallel Output CommsDACFigure 4. THS5651 to C542 DSP Interface 3.1 Reference Voltage Inputs 3 Operational Overview3.2 Input Data Bits Table 1. Signal Connections 3.3 Connections Between the DSP and the EVM3.3.1 Jumpers Used on the TLV1562EVM Table 2. 3-Position JumpersTable 3. 2-Position Jumpers 8SLAA0404 The Serial DAC/DSP System Table 4. DSP/DAC InterconnectionTable 5. DSP Serial Port Signals and Registers 5 The DSP Serial Port6 Other DSP/TLV1562 Signals 6.1 DSP Internal Serial Port Operation7.2 Mono Interrupt Driven Mode Using RD 7 Conversation Between the TLV1562 and the DSP7.1 Writing to the ADC Table 6. DSP Algorithm for Writing to the ADCtDCSL-sample+1ADCSYSCLK Table 7. DSP Algorithm for Mono Interrupt Driven Mode Using RDtENDATAOUT = 41 ns Table 8. DSP Algorithm for Mono Interrupt Driven Mode Using CSTART 7.3 Mono Interrupt Driven Mode Using CSTART14 SLAA040 7.4 Dual Interrupt Driven Mode Table 9. DSP Algorithm for Dual Interrupt Driven ModeTable 10. DSP Algorithm for Mono Continuous Mode 7.5 Mono Continuous Mode16 SLAA040 7.6 Dual Continuous Mode Table 11. DSP Algorithm for Dual Continuous Mode8.1 Software Development tools 8 Software Overview8.2 DSP Memory Map Figure 5. Memory Map 8.3.3 Timer Output 8.3 Programming Strategies for the ’C54x, Explanations8.3.1 Optimizing CPU Resources for Maximum Data Rates 8.3.2 Address and Data Bus for I/O Tasks8.3.4 Data Page Pointer 8.3.5 Generating the Chip Select Signal and the CSTART Signal8.3.6 Interfacing the Serial DAC 5618A to the DSP 8.3.7 Interrupt Latency 8.3.8 Branch Optimization goto/dgoto, call/dcallGOTO MARK MARK DP = #1 ARP = #58.4 Software Code Explanation 8.3.9 Enabling Software Modules .if/.elseif/.endif8.4.1 Software Principals of the Interface 8.4.1.2 Timed Solution 8.4.1.1 Software PollingAdvantage Disadvantage8.4.1.3 Interrupt Driven Solution 8.4.1.5 Setting the Right SwitchesAdvantages DisadvantagesTask Table 12. Switch SettingsTable 13. Instruction in the Program Header Step 8.5 Flow Charts and Comments for All Software Modes 8.5.1 The Mono Interrupt Driven Mode Using RD to Start ConversionTable 14. Instruction in the Program Header Step 8.4.1.6 Common Software for all ModesProgram Files Other FilesCode verification common file of all modes constants definitionFigure 6. Software Flow of the Mono Interrupt Driven Solution 8.5.2 Mono Interrupt Driven Mode Using CSTART to Start Conversion Calibration procedure of the DACIncludes the complete software algorithm to control the monomode Common file of all modes constants definitionInitialize SPI SAVEPoll INTO Pin Until h/0 Transition Occurs Pull Down CSTART8.5.2.1 Throughput Optimization† This only works for one TLV1562 not multiple because CS is not usedFigure 8. Time Optimization monocst1 8.5.3 Dual Interrupt Driven ModeMaximum Performance at 1.2 MSPS with Internal Clock IMPORTANT NOTE The code has been optimized to maximize the data throughput. It was found that CSTART can be pulled low earlier than the data read instruction is performed by the DSP. This saves the 100-ns wait time in STEP 3 because the data read requires at least 100 ns. Therefore, CSTART gets pulled high directly after data read, and the interface becomes faster and gains throughput. This variation will be found in the code. The data acquisition is done in a small number of steps that explains everything inside the code Software Overview 8.5.4 Mono Continuous Mode Figure 10. Flow Chart Mono Continuous Mode 8.5.5 Dual Continuous Mode Figure 11. Flow Chart Dual Continuous Mode Other Files 8.6.1 Common Software for all Modes except C-Callable 8.6 Source Code8.6.1.1 Constants.asm set 000C0h Operate without calibrated inputs no offset 42 SLAA0408.6.1.2 Interrupt Vectors 4C internal timer interrupt 44 SLAA0408.6.1.3 linker,cmd 8.6.1.4 Auto.batFile Linker.lnk COMMAND FILE title ”COMMAND FILE FOR TLV1562.ASM”Mainprogram Monomode.asm pointer address when using any of the following variablesjump address to init. new channel counter for one channelsent value to register CR0 of the ADC endif if INT0DRIVENPOLLINGDRV if SENDOUTSERIAL48 SLAA040 endif if AUTOPWDNENABLE endif if DIFFINPUTMODE= bit*AR5,15-0 elseif INT0DRIVENelseif NOINT0SIG 52 SLAA040 8.6.3 Calibration of the ADC CALIBRAT.ASM54 SLAA040 if SMECALIBRATION 56 SLAA040 Software Overview 58 SLAA040 Software Overview 60 SLAA040 if INT0DRIVENPOLLINGDRV 62 SLAA040 = bit*AR5,15-0 endif if SAVEINTOMEMORY 64 SLAA040endif 8.6.5 Dual Interrupt Driven Mode Constants definition - see 8.6.1.1 Constants.asmInterrupt Routine handler - see 8.6.1.2 Interrupt Vectors Mainprogram DUALIRQ1.asmSoftware Overview Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSPSoftware Overview if SENDOUTSERIALendif 70 SLAA040 if AUTOPWDNENABLE 72 SLAA040 Software Overview Mainprogram MONOCON1.asm 8.6.6 Mono Continuous Mode74 SLAA040 Software Overview 76 SLAA040 endif if EXTERNALCLOCK 78 SLAA040 Software Overview Mainprogram DUALCON1.asm 8.6.7 Dual Continuous Mode80 SLAA040 Software Overview 82 SLAA040 Software Overview 84 SLAA040 Software Overview 8.6.8 C-Callable Mainprogram C1562.cTLV1562Channel, Save Memory Start address, NUMBEROFSAMPLES 80h samples of channel 1 will be stored beginning on 2000hSoftware Overview 88 SLAA040 AR7+ = data@ADSAMPLE Vectors.asm 90 SLAA040int2 returnenable 48 external interrupt int2 nop Linker.cmd Auto.bat92 SLAA040 9 Summary 10 References