Texas Instruments Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP, Introduction

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Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP

Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP

Falk Alicke and Perry Miller

ABSTRACT

In this application report we discuss the hardware and software interface of the TLV1562, 10-bit parallel-output analog-to-digital converter (ADC) to the TMS320C54x digital signal processor (DSP). The hardware interface board, or evaluation module (EVM) consists of the TLV1562 10-bit ADC, a THS5651 10-bit parallel output communication digital-to-analog converter (CommsDAC) and a TLC5618A serial-outputdigital-to-analog converter (DAC).

Following the discussion of the ADC we explain the need for both the THS5651 CommsDAC and the TLC5618A serial DAC.

The application report concludes with several software application examples and recommendations for simplifying the software through modifications of the DSP hardware interface circuit.

1 Introduction

The analog-to-digital (A/D) interface can present a significant design problem because hardware and software must work together across the interface to produce a usable, complete design. This application report provides a design solution for the interface between the TLV1562 10-bit parallel-output analog-to-digital converter (ADC) and the TMS320C54x digital signal processor (DSP).

The report describes the hardware and software needed to interface the ’C54x DSP to the TLV1562 ADC, which is intended for applications, such as industrial control and signal intelligence in which large amounts of data must be processed quickly. The first sections describe the basic operation of the TLV1562. For additional information see the References section at the end of this report.

2 The Board

The TLV1562 evaluation module (EVM) is a four-layer printed circuit board (PCB) constructed from FR4 material. The PCB dimensions are 180 mm ⋅ 112 mm ⋅ 12 mm. Ribbon cables are used to interface the TLV1562EVM to the TMS320C54x DSK plus starter kit.

2.1TMS320C54x Starter Kit

The starter kit simplifies the task of interfacing to the ’C54x processor. It comes with an ADC for voice bandwidth, and GoDSP code explorer as the software tool. A 10-MHz oscillator provides the clock signal to allow 40-MHz internal DSP clock cycles generated by the internal DSP PLL. Therefore, the board provides 40 MIPS of processing power.

Ribbon cables are used to connect the DSP with the EVM. Detailed descriptions of all connections are given later in this report.

CommsDAC is a trademark of Texas Instruments.

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Contents TParalInteMS3rflelADConvertertotheacing20C54xDSPtheTLV1562 JulySLAA040 Application ReportIMPORTANT NOTICE Contents 8.5.5 List of Tables List of FiguresFigures viSLAA040 2.1 TMS320C54x Starter Kit Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP1 Introduction 2 The Board2.3.1.1 The Universal Interface 2.2 TLV1562EVM2.3 ADC TLV1562 Overview 2.3.1 Suggestions for the ’C54x to TLV1562 Interface2.3.2 Recyclic Architecture Using RD or the CSTART Signal to Start ConversionFigure 2. TLV1562 to ’C54x DSP Interface of the EVM 2.4 Onboard Components 2.3.3 Note on the Interface, Using an External ADC Clock Drive2.4.1 TLC5618A - Serial DAC Figure 3. TLC5618A to ’C542 DSP Interface 2.4.2 THS5651 - Parallel Output CommsDACFigure 4. THS5651 to C542 DSP Interface 3.1 Reference Voltage Inputs 3 Operational Overview3.2 Input Data Bits 3.3 Connections Between the DSP and the EVM Table 1. Signal Connections8SLAA040 3.3.1 Jumpers Used on the TLV1562EVMTable 2. 3-Position Jumpers Table 3. 2-Position JumpersTable 4. DSP/DAC Interconnection 4 The Serial DAC/DSP System5 The DSP Serial Port Table 5. DSP Serial Port Signals and Registers6.1 DSP Internal Serial Port Operation 6 Other DSP/TLV1562 SignalsTable 6. DSP Algorithm for Writing to the ADC 7.2 Mono Interrupt Driven Mode Using RD7 Conversation Between the TLV1562 and the DSP 7.1 Writing to the ADCtDCSL-sample+1ADCSYSCLK Table 7. DSP Algorithm for Mono Interrupt Driven Mode Using RDtENDATAOUT = 41 ns Table 8. DSP Algorithm for Mono Interrupt Driven Mode Using CSTART 7.3 Mono Interrupt Driven Mode Using CSTART14 SLAA040 Table 9. DSP Algorithm for Dual Interrupt Driven Mode 7.4 Dual Interrupt Driven ModeTable 10. DSP Algorithm for Mono Continuous Mode 7.5 Mono Continuous Mode16 SLAA040 Table 11. DSP Algorithm for Dual Continuous Mode 7.6 Dual Continuous Mode8.1 Software Development tools 8 Software Overview8.2 DSP Memory Map Figure 5. Memory Map 8.3.2 Address and Data Bus for I/O Tasks 8.3.3 Timer Output8.3 Programming Strategies for the ’C54x, Explanations 8.3.1 Optimizing CPU Resources for Maximum Data Rates8.3.4 Data Page Pointer 8.3.5 Generating the Chip Select Signal and the CSTART Signal8.3.6 Interfacing the Serial DAC 5618A to the DSP MARK DP = #1 ARP = #5 8.3.7 Interrupt Latency8.3.8 Branch Optimization goto/dgoto, call/dcall GOTO MARK8.4 Software Code Explanation 8.3.9 Enabling Software Modules .if/.elseif/.endif8.4.1 Software Principals of the Interface Disadvantage 8.4.1.2 Timed Solution8.4.1.1 Software Polling AdvantageDisadvantages 8.4.1.3 Interrupt Driven Solution8.4.1.5 Setting the Right Switches AdvantagesTask Table 12. Switch SettingsTable 13. Instruction in the Program Header Step 8.4.1.6 Common Software for all Modes 8.5 Flow Charts and Comments for All Software Modes8.5.1 The Mono Interrupt Driven Mode Using RD to Start Conversion Table 14. Instruction in the Program Header Stepcommon file of all modes constants definition Program FilesOther Files Code verificationFigure 6. Software Flow of the Mono Interrupt Driven Solution Common file of all modes constants definition 8.5.2 Mono Interrupt Driven Mode Using CSTART to Start ConversionCalibration procedure of the DAC Includes the complete software algorithm to control the monomodePull Down CSTART Initialize SPISAVE Poll INTO Pin Until h/0 Transition OccursThis only works for one TLV1562 not multiple because CS is not used 8.5.2.1 Throughput Optimization†Figure 8. Time Optimization monocst1 8.5.3 Dual Interrupt Driven ModeMaximum Performance at 1.2 MSPS with Internal Clock IMPORTANT NOTE The code has been optimized to maximize the data throughput. It was found that CSTART can be pulled low earlier than the data read instruction is performed by the DSP. This saves the 100-ns wait time in STEP 3 because the data read requires at least 100 ns. Therefore, CSTART gets pulled high directly after data read, and the interface becomes faster and gains throughput. This variation will be found in the code. The data acquisition is done in a small number of steps that explains everything inside the code Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 8.5.4 Mono Continuous Mode Figure 10. Flow Chart Mono Continuous Mode 8.5.5 Dual Continuous Mode Figure 11. Flow Chart Dual Continuous Mode Other Files 8.6.1 Common Software for all Modes except C-Callable 8.6 Source Code8.6.1.1 Constants.asm 42 SLAA040 set 000C0h Operate without calibrated inputs no offset8.6.1.2 Interrupt Vectors 44 SLAA040 4C internal timer interrupttitle ”COMMAND FILE FOR TLV1562.ASM” 8.6.1.3 linker,cmd8.6.1.4 Auto.bat File Linker.lnk COMMAND FILEcounter for one channel Mainprogram Monomode.asmpointer address when using any of the following variables jump address to init. new channelsent value to register CR0 of the ADC endif if INT0DRIVENPOLLINGDRV if SENDOUTSERIAL48 SLAA040 endif elseif INT0DRIVEN if AUTOPWDNENABLEendif if DIFFINPUTMODE = bit*AR5,15-0elseif NOINT0SIG 52 SLAA040 CALIBRAT.ASM 8.6.3 Calibration of the ADC54 SLAA040 if SMECALIBRATION 56 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 58 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 60 SLAA040 if INT0DRIVENPOLLINGDRV 62 SLAA040 = bit*AR5,15-0 64 SLAA040 endif if SAVEINTOMEMORYendif Mainprogram DUALIRQ1.asm 8.6.5 Dual Interrupt Driven ModeConstants definition - see 8.6.1.1 Constants.asm Interrupt Routine handler - see 8.6.1.2 Interrupt VectorsInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP Software Overviewif SENDOUTSERIAL Software Overviewendif 70 SLAA040 if POLLINGDRV 72 SLAA040 endif Mainprogram MONOCON1.asm 8.6.6 Mono Continuous Mode74 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 76 SLAA040 endif if EXTERNALCLOCK 78 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP Mainprogram DUALCON1.asm 8.6.7 Dual Continuous Mode80 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 82 SLAA040 endif 84 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 80h samples of channel 1 will be stored beginning on 2000h 8.6.8 C-CallableMainprogram C1562.c TLV1562Channel, Save Memory Start address, NUMBEROFSAMPLESInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 88 SLAA040 AR7+ = data@ADSAMPLE 90 SLAA040 Vectors.asmint2 returnenable 48 external interrupt int2 nop Linker.cmd Auto.bat92 SLAA040 10 References 9 Summary
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