Texas Instruments TLV1562 manual Connections Between the DSP and the EVM, Signal Connections

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3.3Connections Between the DSP and the EVM

Operational Overview

3.3Connections Between the DSP and the EVM

The following connections provide the interface between the DSP and the EVM:

Table 1. Signal Connections

DSP Signal

Connector/Pin on the DSKplus cir-

 

Connector/Pin on

ADC Signal

 

 

 

cuit board

 

the TLV1562EVM

 

 

 

 

 

 

 

 

General

 

 

 

 

 

 

 

 

 

 

 

GND

Connector JP4: Pin 1, 10, 11, 12, 14,



J10/2,J10/4,...,J10/34

GND

 

 

 

15, 19, 20, 21, 27, 34, 35

J11/4,J11/6,...,J11/26

 

 

 

 

 

 

 

 

 

 

 

Connector JP5: Pin 6, 10, 11, 12

 

 

 

 

 

 

 

 

 

 

VCC

JP1/32



N/A

VCC

Parallel Interface

 

 

 

 

 

 

 

 

 

 

CLKOUT

JP3/2



J11/11

CLKIN

 

 

JP5/1



J11/5

 

 

 

 

 

 

 

 

INT0

 

 

INT

 

 

 

 

 

 

XF

JP4/8



J11/3

 

 

 

 

 

 

RD

 

 

 

 

 

 

 

 

 



 

 

 

 

 

R/W

JP4/30

J11/9

decoded to the

WR

line

 

 



 

 

 

 

 

IOSTRB

 

JP4/36

J11/7

decoded to the

WR

line

 

 



 

 

 

A0

JP5/34

J11/2

addr. decoder for

CS

and

CSTART

 

 



 

 

A1

JP5/35

J11/1

addr. decoder for

CS

and

CSTART

D0

JP3/35



J10/13

D0

D1

JP3/34



J10/15

D1

D2

JP3/8



J10/17

D2

D3

JP3/12



J10/19

D3

D4

JP3/11



J10/21

D4

D5

JP3/15



J10/23

D5

D6

JP3/14



J10/25

D6

D7

JP3/18



J10/27

D7

D8

JP3/17



J10/29

D8

D9

JP3/21



J10/31

D9

Serial Interface to the DAC TLC5618A

 

 

 

 

 

 

 

 

 

 

BCLKR

JP1/14



J11/25

SCLK

BCLKX

JP1/17



J11/23

SCLK

BFSR

JP1/20



J11/21

CS

BFSX

JP1/23



J11/19

CS

BDR

JP1/26



J11/17

DIN

BDX

JP1/29



J11/15

DIN

Signals D[9–0] of the TLV1562 and D[9–0] of the DSP are tied together in this application to simplify hardware debugging during the development phase. However, if the 2s complement feature of the DAC is to be used, it is easier to connect D[15-6] of the DSP with D[9–0] of the ADC. A simple right shift of the result then evaluates the result when sign extension mode (SXM) is enabled.

Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP

7

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Contents SLAA040 JulyApplication Report TParalInteMS3rflelADConvertertotheacing20C54xDSPtheTLV1562IMPORTANT NOTICE Contents 8.5.5 List of Tables List of FiguresFigures viSLAA040 1 Introduction Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP2 The Board 2.1 TMS320C54x Starter Kit2.3 ADC TLV1562 Overview 2.2 TLV1562EVM2.3.1 Suggestions for the ’C54x to TLV1562 Interface 2.3.1.1 The Universal Interface2.3.2 Recyclic Architecture Using RD or the CSTART Signal to Start ConversionFigure 2. TLV1562 to ’C54x DSP Interface of the EVM 2.4 Onboard Components 2.3.3 Note on the Interface, Using an External ADC Clock Drive2.4.1 TLC5618A - Serial DAC Figure 3. TLC5618A to ’C542 DSP Interface 2.4.2 THS5651 - Parallel Output CommsDACFigure 4. THS5651 to C542 DSP Interface 3.1 Reference Voltage Inputs 3 Operational Overview3.2 Input Data Bits 3.3 Connections Between the DSP and the EVM Table 1. Signal ConnectionsTable 2. 3-Position Jumpers 3.3.1 Jumpers Used on the TLV1562EVMTable 3. 2-Position Jumpers 8SLAA040Table 4. DSP/DAC Interconnection 4 The Serial DAC/DSP System5 The DSP Serial Port Table 5. DSP Serial Port Signals and Registers6.1 DSP Internal Serial Port Operation 6 Other DSP/TLV1562 Signals7 Conversation Between the TLV1562 and the DSP 7.2 Mono Interrupt Driven Mode Using RD7.1 Writing to the ADC Table 6. DSP Algorithm for Writing to the ADCtDCSL-sample+1ADCSYSCLK Table 7. DSP Algorithm for Mono Interrupt Driven Mode Using RDtENDATAOUT = 41 ns Table 8. DSP Algorithm for Mono Interrupt Driven Mode Using CSTART 7.3 Mono Interrupt Driven Mode Using CSTART14 SLAA040 Table 9. DSP Algorithm for Dual Interrupt Driven Mode 7.4 Dual Interrupt Driven ModeTable 10. DSP Algorithm for Mono Continuous Mode 7.5 Mono Continuous Mode16 SLAA040 Table 11. DSP Algorithm for Dual Continuous Mode 7.6 Dual Continuous Mode8.1 Software Development tools 8 Software Overview8.2 DSP Memory Map Figure 5. Memory Map 8.3 Programming Strategies for the ’C54x, Explanations 8.3.3 Timer Output8.3.1 Optimizing CPU Resources for Maximum Data Rates 8.3.2 Address and Data Bus for I/O Tasks8.3.4 Data Page Pointer 8.3.5 Generating the Chip Select Signal and the CSTART Signal8.3.6 Interfacing the Serial DAC 5618A to the DSP 8.3.8 Branch Optimization goto/dgoto, call/dcall 8.3.7 Interrupt LatencyGOTO MARK MARK DP = #1 ARP = #58.4 Software Code Explanation 8.3.9 Enabling Software Modules .if/.elseif/.endif8.4.1 Software Principals of the Interface 8.4.1.1 Software Polling 8.4.1.2 Timed SolutionAdvantage Disadvantage8.4.1.5 Setting the Right Switches 8.4.1.3 Interrupt Driven SolutionAdvantages DisadvantagesTask Table 12. Switch SettingsTable 13. Instruction in the Program Header Step 8.5.1 The Mono Interrupt Driven Mode Using RD to Start Conversion 8.5 Flow Charts and Comments for All Software ModesTable 14. Instruction in the Program Header Step 8.4.1.6 Common Software for all ModesOther Files Program FilesCode verification common file of all modes constants definitionFigure 6. Software Flow of the Mono Interrupt Driven Solution Calibration procedure of the DAC 8.5.2 Mono Interrupt Driven Mode Using CSTART to Start ConversionIncludes the complete software algorithm to control the monomode Common file of all modes constants definitionSAVE Initialize SPIPoll INTO Pin Until h/0 Transition Occurs Pull Down CSTARTThis only works for one TLV1562 not multiple because CS is not used 8.5.2.1 Throughput Optimization†Figure 8. Time Optimization monocst1 8.5.3 Dual Interrupt Driven ModeMaximum Performance at 1.2 MSPS with Internal Clock IMPORTANT NOTE The code has been optimized to maximize the data throughput. It was found that CSTART can be pulled low earlier than the data read instruction is performed by the DSP. This saves the 100-ns wait time in STEP 3 because the data read requires at least 100 ns. Therefore, CSTART gets pulled high directly after data read, and the interface becomes faster and gains throughput. This variation will be found in the code. The data acquisition is done in a small number of steps that explains everything inside the code Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 8.5.4 Mono Continuous Mode Figure 10. Flow Chart Mono Continuous Mode 8.5.5 Dual Continuous Mode Figure 11. Flow Chart Dual Continuous Mode Other Files 8.6.1 Common Software for all Modes except C-Callable 8.6 Source Code8.6.1.1 Constants.asm 42 SLAA040 set 000C0h Operate without calibrated inputs no offset8.6.1.2 Interrupt Vectors 44 SLAA040 4C internal timer interrupt8.6.1.4 Auto.bat 8.6.1.3 linker,cmdFile Linker.lnk COMMAND FILE title ”COMMAND FILE FOR TLV1562.ASM”pointer address when using any of the following variables Mainprogram Monomode.asmjump address to init. new channel counter for one channelsent value to register CR0 of the ADC endif if INT0DRIVENPOLLINGDRV if SENDOUTSERIAL48 SLAA040 endif endif if DIFFINPUTMODE if AUTOPWDNENABLE= bit*AR5,15-0 elseif INT0DRIVENelseif NOINT0SIG 52 SLAA040 CALIBRAT.ASM 8.6.3 Calibration of the ADC54 SLAA040 if SMECALIBRATION 56 SLAA040 endif 58 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 60 SLAA040 if INT0DRIVENPOLLINGDRV 62 SLAA040 = bit*AR5,15-0 64 SLAA040 endif if SAVEINTOMEMORYendif Constants definition - see 8.6.1.1 Constants.asm 8.6.5 Dual Interrupt Driven ModeInterrupt Routine handler - see 8.6.1.2 Interrupt Vectors Mainprogram DUALIRQ1.asmInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP Software Overviewif SENDOUTSERIAL Software Overviewendif 70 SLAA040 Software Overview 72 SLAA040 endif Mainprogram MONOCON1.asm 8.6.6 Mono Continuous Mode74 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 76 SLAA040 endif if EXTERNALCLOCK 78 SLAA040 endif if SAVEINTOMEMORY Mainprogram DUALCON1.asm 8.6.7 Dual Continuous Mode80 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 82 SLAA040 endif if EXTERNALCLOCK 84 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP Mainprogram C1562.c 8.6.8 C-CallableTLV1562Channel, Save Memory Start address, NUMBEROFSAMPLES 80h samples of channel 1 will be stored beginning on 2000hInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 88 SLAA040 AR7+ = data@ADSAMPLE 90 SLAA040 Vectors.asmint2 returnenable 48 external interrupt int2 nop Linker.cmd Auto.bat92 SLAA040 10 References 9 Summary