Texas Instruments TLV1562 2.4.2 THS5651 - Parallel Output CommsDAC, THS5651 to C542 DSP Interface

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Figure 3. TLC5618A to ’C542 DSP Interface

The Board

Serial DAC

SCLK

CS

TLC5618A

DIN

DSP

BCLKX

BCLKR

BFSX TMS320C542

BFSR

BDX

BDR

TLV1562 EVM Pin Connector

Figure 3. TLC5618A to ’C542 DSP Interface

2.4.2THS5651 – Parallel Output CommsDAC

This 10-bit data converter has a parallel interface and is able to update its output with 100 MSPS. The two outputs on the 28-pin package can each drive a current between 2 mA and 20 mA with an output resistance >100 kΩ (ideal current source: output impedance → ∞ ). The data bus and the address decoder provide the interface to the DSP.

Parallel DAC	DSP
CLK	CLKOUT
THS5651	TMS320C542
	A(0–1) = 11b
D(0–9)	D(0–9)
	Buffer

Figure 4. THS5651 to C542 DSP Interface

Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP

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Contents TParalInteMS3rflelADConvertertotheacing20C54xDSPtheTLV1562 JulySLAA040 Application ReportIMPORTANT NOTICE Contents 8.5.5 Figures List of FiguresList of Tables viSLAA040 2.1 TMS320C54x Starter Kit Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP1 Introduction 2 The Board2.3.1.1 The Universal Interface 2.2 TLV1562EVM2.3 ADC TLV1562 Overview 2.3.1 Suggestions for the ’C54x to TLV1562 InterfaceFigure 2. TLV1562 to ’C54x DSP Interface of the EVM Using RD or the CSTART Signal to Start Conversion2.3.2 Recyclic Architecture 2.4.1 TLC5618A - Serial DAC 2.3.3 Note on the Interface, Using an External ADC Clock Drive2.4 Onboard Components Figure 4. THS5651 to C542 DSP Interface 2.4.2 THS5651 - Parallel Output CommsDACFigure 3. TLC5618A to ’C542 DSP Interface 3.2 Input Data Bits 3 Operational Overview3.1 Reference Voltage Inputs 3.3 Connections Between the DSP and the EVM Table 1. Signal Connections8SLAA040 3.3.1 Jumpers Used on the TLV1562EVMTable 2. 3-Position Jumpers Table 3. 2-Position JumpersTable 4. DSP/DAC Interconnection 4 The Serial DAC/DSP System5 The DSP Serial Port Table 5. DSP Serial Port Signals and Registers6.1 DSP Internal Serial Port Operation 6 Other DSP/TLV1562 SignalsTable 6. DSP Algorithm for Writing to the ADC 7.2 Mono Interrupt Driven Mode Using RD7 Conversation Between the TLV1562 and the DSP 7.1 Writing to the ADCtENDATAOUT = 41 ns Table 7. DSP Algorithm for Mono Interrupt Driven Mode Using RDtDCSL-sample+1ADCSYSCLK 14 SLAA040 7.3 Mono Interrupt Driven Mode Using CSTARTTable 8. DSP Algorithm for Mono Interrupt Driven Mode Using CSTART Table 9. DSP Algorithm for Dual Interrupt Driven Mode 7.4 Dual Interrupt Driven Mode16 SLAA040 7.5 Mono Continuous ModeTable 10. DSP Algorithm for Mono Continuous Mode Table 11. DSP Algorithm for Dual Continuous Mode 7.6 Dual Continuous Mode8.2 DSP Memory Map 8 Software Overview8.1 Software Development tools Figure 5. Memory Map 8.3.2 Address and Data Bus for I/O Tasks 8.3.3 Timer Output8.3 Programming Strategies for the ’C54x, Explanations 8.3.1 Optimizing CPU Resources for Maximum Data Rates8.3.6 Interfacing the Serial DAC 5618A to the DSP 8.3.5 Generating the Chip Select Signal and the CSTART Signal8.3.4 Data Page Pointer MARK DP = #1 ARP = #5 8.3.7 Interrupt Latency8.3.8 Branch Optimization goto/dgoto, call/dcall GOTO MARK8.4.1 Software Principals of the Interface 8.3.9 Enabling Software Modules .if/.elseif/.endif8.4 Software Code Explanation Disadvantage 8.4.1.2 Timed Solution8.4.1.1 Software Polling AdvantageDisadvantages 8.4.1.3 Interrupt Driven Solution8.4.1.5 Setting the Right Switches AdvantagesTable 13. Instruction in the Program Header Step Table 12. Switch SettingsTask 8.4.1.6 Common Software for all Modes 8.5 Flow Charts and Comments for All Software Modes8.5.1 The Mono Interrupt Driven Mode Using RD to Start Conversion Table 14. Instruction in the Program Header Stepcommon file of all modes constants definition Program FilesOther Files Code verificationFigure 6. Software Flow of the Mono Interrupt Driven Solution Common file of all modes constants definition 8.5.2 Mono Interrupt Driven Mode Using CSTART to Start ConversionCalibration procedure of the DAC Includes the complete software algorithm to control the monomodePull Down CSTART Initialize SPISAVE Poll INTO Pin Until h/0 Transition OccursThis only works for one TLV1562 not multiple because CS is not used 8.5.2.1 Throughput Optimization†Maximum Performance at 1.2 MSPS with Internal Clock 8.5.3 Dual Interrupt Driven ModeFigure 8. Time Optimization monocst1 IMPORTANT NOTE The code has been optimized to maximize the data throughput. It was found that CSTART can be pulled low earlier than the data read instruction is performed by the DSP. This saves the 100-ns wait time in STEP 3 because the data read requires at least 100 ns. Therefore, CSTART gets pulled high directly after data read, and the interface becomes faster and gains throughput. This variation will be found in the code. The data acquisition is done in a small number of steps that explains everything inside the code Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 8.5.4 Mono Continuous Mode Figure 10. Flow Chart Mono Continuous Mode 8.5.5 Dual Continuous Mode Figure 11. Flow Chart Dual Continuous Mode Code verification 8.6.1.1 Constants.asm 8.6 Source Code8.6.1 Common Software for all Modes except C-Callable 42 SLAA040 set 000C0h Operate without calibrated inputs no offset8.6.1.2 Interrupt Vectors 44 SLAA040 4C internal timer interrupttitle ”COMMAND FILE FOR TLV1562.ASM” 8.6.1.3 linker,cmd8.6.1.4 Auto.bat File Linker.lnk COMMAND FILEcounter for one channel Mainprogram Monomode.asmpointer address when using any of the following variables jump address to init. new channelsent value to register CR0 of the ADC 48 SLAA040 if SENDOUTSERIALendif if INT0DRIVENPOLLINGDRV endif elseif INT0DRIVEN if AUTOPWDNENABLEendif if DIFFINPUTMODE = bit*AR5,15-0elseif NOINT0SIG 52 SLAA040 CALIBRAT.ASM 8.6.3 Calibration of the ADC54 SLAA040 if SMECALIBRATION 56 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 58 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 60 SLAA040 if INT0DRIVENPOLLINGDRV 62 SLAA040 = bit*AR5,15-0 64 SLAA040 endif if SAVEINTOMEMORYInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP Mainprogram DUALIRQ1.asm 8.6.5 Dual Interrupt Driven ModeConstants definition - see 8.6.1.1 Constants.asm Interrupt Routine handler - see 8.6.1.2 Interrupt VectorsInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP Software Overviewif SENDOUTSERIAL Software OverviewInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 70 SLAA040 if POLLINGDRV 72 SLAA040 endif 74 SLAA040 8.6.6 Mono Continuous ModeMainprogram MONOCON1.asm Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 76 SLAA040 endif if EXTERNALCLOCK 78 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 80 SLAA040 8.6.7 Dual Continuous ModeMainprogram DUALCON1.asm Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 82 SLAA040 endif 84 SLAA040 Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 80h samples of channel 1 will be stored beginning on 2000h 8.6.8 C-CallableMainprogram C1562.c TLV1562Channel, Save Memory Start address, NUMBEROFSAMPLESInterfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 88 SLAA040 AR7+ = data@ADSAMPLE 90 SLAA040 Vectors.asmint2 returnenable 48 external interrupt int2 nop 92 SLAA040 Auto.batLinker.cmd 10 References 9 Summary