SUPERSERVER
1-3 Mainboard Features
At the heart of the SuperServer
Chipset
The P4DLR+ is based on the ServerWorks Grand Champion LETM
The
The North Bridge interfaces directly to the processor bus and integrates the functions of the main memory subsystem and the IMB bus interface unit. The memory subsystem consists of an
The South Bridge provides various integrated functions, including the PCI to ISA bridge and support for UDMA100, security (passwords and system protection), Plug & Play, USBs, power management, interrupt controllers and the SMBus.
The CIOBX2 is an integrated IO bridge that provides
Processors
The P4DLR+ supports single or dual Intel Xeon 512K L2 cache processors of up to 2.4+ GHz at a 400 MHz FSB. Please refer to the support section of our web site for a complete listing of supported processors (http:// www.supermicro.com/TechSupport.htm).
Memory
The P4DLR+ has 4