Xilinx XAPP169 manual IDT RC32364 RISController, MP3 NG System Block Diagram

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MP3 NG: A Next Generation Consumer Platform

R

 

 

 

 

 

7

Serial Data

SED1743

128

 

 

 

 

 

 

 

 

LCD Column

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Driver

 

 

 

USBN9602

3

 

 

 

 

 

 

 

USB

 

 

 

 

 

 

128 x 128

 

 

 

 

 

 

 

 

 

Interface

Control

 

2

Serial Data

SED1758

128

LCD Panel

 

 

 

 

 

 

 

LCD Row

 

&

 

8

 

 

 

 

 

Driver

 

4 Wire Touch

 

 

 

 

 

 

 

 

Membrane

 

 

 

 

 

 

 

 

 

RC32364

IRQ

 

 

Xilinx

 

 

 

 

 

Addr/Data 32

 

 

MAX1108

 

 

RISC

Spartan II

3

Serial Data

 

 

CPU

 

Control

21

FPGA

 

 

2 Channel

 

 

 

 

 

 

 

 

 

ADC

 

 

 

 

 

 

 

2

Control Port

CS4343

L

To Stereo

 

 

 

 

 

 

 

 

 

IRMS6100

 

 

3

Serial Audio

Audio

R

Headphone

 

3

 

 

 

DAC

 

Jack

 

IRDA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Transceiver

 

 

16

Data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11 Address

 

 

CompactFlash

 

 

 

 

 

17 Control

 

 

Interface

 

 

 

 

 

 

 

 

 

 

 

 

 

11

Control

 

 

 

 

 

 

 

 

9

Control

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

MT48LC1M16A1

KM29U64000T

 

 

 

 

 

 

 

 

SDRAM

FLASH

 

 

Figure 1: MP3 NG System Block Diagram

IDT RC32364 RISController™

The processor chosen for this design is the IDT RC32364. The features of this device that are leveraged in this application are:

Paged memory management unit.

High-performance, 175 dhrystone MIPs at 133 MHz.

Integer Multiply ACcumulate (MAC) support, 67M MACs/second at 133 MHz.

Separate, line lockable, instruction (8 KB) and data (2 KB) caches.

Power saving features including active power management and a power-down operating mode.

On-chip In Circuit Emulation (ICE) interface to provide access to internal CPU state (registers, cache) and for debug control (breakpoints, single step, insert instructions into pipeline).

Figure 2 shows the block diagram for this device. The complete data sheet for the RC32364 can be found at the following URL:

http://www.idt.com/docs/79RC32364_DS_32100.pdf

The RC32364’s MMU consists of address translation logic and a Translation Lookaside Buffer (TLB) capable of supporting demand paged virtual memory. In addition, it includes several features that are valuable in an embedded application such as variable sized pages and lockable TLB entries. Figure 3 illustrates the virtual to physical address translation performed by the RC32364.

XAPP169 (v1.0) November 24, 1999

www.xilinx.com

3

1-800-255-7778

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Contents MP3 Background MP3 NG a Next Generation Consumer PlatformSummary IntroductionSolution Overview MP3 TechnologyMP3 NG a Next Generation Consumer Platform IDT RC32364 RISController MP3 NG System Block DiagramRC32364 Block Diagram RC32364 Read Timing Crystal CS4343 Stereo DAC CS4343 Block DiagramControl Port Timing Samsung Flash Memory KM29U64000T Block DiagramKM29U64000T Read Timing Micron Sdram MemoryMT48LC1M16A1 Block Diagram Function Controller National SemiconductorSoftware Architecture System ImplementationMP3 Decoder and Audio ISR UI ManagerCode Initialization Xilinx SpartanMemory Manager Block MappingIP Bus Controller Fpga Logic Block DiagramCPU Interface CPU Interface Block DiagramCpumasterclk LCD ControllerLCD Controller Interface Signal Summary LCD Controller Block DiagramMemory Interface Memory Interface Block DiagramSdram Controller Interface Signal Summary Type Description Sdram ControllerFlash Controller Performance Error HandlingIrda Controller Irda Controller Block DiagramAudio DAC Interface Audio DAC Interface Block DiagramTouch Screen Interface Audio DAC Interface Signal Summary Type DescriptionConclusion Spartan Device SelectionTotal 500 137 References Date Version # Revision 11/24/99 Initial release Revision History

XAPP169 specifications

Xilinx XAPP169 is a pioneering application note that delves into the design and implementation of high-performance digital signal processing (DSP) systems. It serves as a reference guide for engineers and designers looking to leverage Xilinx Field Programmable Gate Arrays (FPGAs) for sophisticated DSP applications. The document provides a comprehensive overview of the techniques and methodologies necessary to harness the power and flexibility of FPGA technology in DSP design.

One of the main features of XAPP169 is its focus on the integration of various DSP functions, including filtering, modulation, and Fourier transforms. By utilizing the inherent parallelism of FPGAs, designers can achieve significant performance enhancements compared to traditional DSP implementations. This parallel processing capability allows for real-time processing of high-bandwidth signals, making XAPP169 ideal for applications such as telecommunications, aerospace, and medical imaging.

The application note emphasizes the use of Xilinx’s advanced tools and libraries, such as the Xilinx System Generator for DSP and the Xilinx Vivado Design Suite. These tools facilitate the modeling, simulation, and synthesis of DSP algorithms tailored to specific requirements, enabling a rapid development cycle. By providing pre-optimized building blocks and IP cores, XAPP169 streamlines the design process, reducing time-to-market for new products and innovations.

Additionally, XAPP169 highlights the ability to leverage high-speed serial transceivers present in Xilinx FPGAs. These transceivers enable reliable transmission of data across long distances with minimized latency and optimized bandwidth utilization. The application note outlines various techniques for managing signal integrity and maximizing throughput, ensuring that designs can meet the stringent requirements of modern DSP applications.

Another characteristic of XAPP169 is its attention to resource utilization and optimization strategies. The document discusses how to balance performance with area and power consumption, which is crucial in embedded applications where space and power are at a premium. By employing advanced synthesis strategies and leveraging the capabilities of Xilinx’s architecture, designers can create efficient and scalable DSP systems.

In summary, Xilinx XAPP169 serves as an invaluable resource for engineers seeking to harness the capabilities of FPGAs in DSP applications. With its focus on high-performance design, integration of advanced tools, and optimization strategies, it opens up new possibilities for innovation in various fields where digital signal processing is essential.