Xilinx XAPP169 manual Crystal CS4343 Stereo DAC, CS4343 Block Diagram

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MP3 NG: A Next Generation Consumer Platform

R

Crystal CS4343 Stereo DAC

The Digital-to-Analog Converter chosen for this design is the Crystal CS4343 from Cirrus Logic. This device features:

1.8V to 3.3V operation.

24-bit conversion at up to 96 kHz.

Digital volume control.

Digital bass and treble boost.

Built-in headphone amplifier capable of delivering 5 mW into a 16 load.

Figure 5 shows the block diagram for this device.

The CS4343 provides three interfaces: the analog stereo headphone interface, the serial port used to transfer digital audio data streams, and the control port used to configure the device.

RST

VA

VD_IO

LRCK

LK/DEM

SDATA

 

DIF1/SDA

DIF0/SCL

 

 

 

VQ_HP

VA_HP

 

CONTROL PORT

 

 

 

 

 

 

 

 

 

∆Σ

ANALOG

ANALOG

 

 

 

DIGITAL

 

VOLUME

 

 

 

 

DAC

FILTER

 

 

 

VOLUME

 

CONTROL

HP

 

 

 

 

 

 

DE-

CONTROL

DIGITAL

 

 

 

HEAD-

 

BASS/TREBLE

 

 

 

 

FILTERS

 

 

 

PHONE

SERIAL

EMPHASIS

BOOST

 

 

 

 

 

 

ANALOG

AMPLIFIER

PORT

 

COMPRESSION

 

 

 

 

 

∆Σ

ANALOG

HP

 

 

LIMITING

 

VOLUME

 

 

 

 

DAC

FILTER

 

 

 

 

 

CONTROL

 

 

 

 

 

 

 

 

 

GND

MCLK

FILT+

REF_GND

 

 

 

Figure 5: CS4343 Block Diagram

(Courtesy Cirrus Logic)

The control port is an industry standard I2C slave interface. I2C is a multidrop, 2-wire, serial interface consisting of a clock (SCL) and data (SDA) and operating at up to 100 kHz. (See Figure 7 Control Port Timing.) The control port is used to configure device features such as volume, muting, equalization, power management, and the operating mode of the serial port. Figure 1 on page 3 gives an overview of control port timing. A detailed description of I2C operation can be found in the I2C specification as described in the references.

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www.xilinx.com

XAPP169 (v1.0) November 24, 1999

 

1-800-255-7778

 

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Contents Introduction MP3 NG a Next Generation Consumer PlatformSummary MP3 BackgroundSolution Overview MP3 TechnologyMP3 NG a Next Generation Consumer Platform MP3 NG System Block Diagram IDT RC32364 RISControllerRC32364 Block Diagram RC32364 Read Timing CS4343 Block Diagram Crystal CS4343 Stereo DACControl Port Timing KM29U64000T Block Diagram Samsung Flash MemoryMicron Sdram Memory KM29U64000T Read TimingMT48LC1M16A1 Block Diagram National Semiconductor Function ControllerSystem Implementation Software ArchitectureUI Manager MP3 Decoder and Audio ISRBlock Mapping Xilinx SpartanMemory Manager Code InitializationFpga Logic Block Diagram IP Bus ControllerCPU Interface Block Diagram CPU InterfaceLCD Controller CpumasterclkLCD Controller Block Diagram LCD Controller Interface Signal SummaryMemory Interface Block Diagram Memory InterfaceSdram Controller Interface Signal Summary Type Description Sdram ControllerFlash Controller Error Handling PerformanceIrda Controller Block Diagram Irda ControllerAudio DAC Interface Block Diagram Audio DAC InterfaceAudio DAC Interface Signal Summary Type Description Touch Screen InterfaceConclusion Spartan Device SelectionTotal 500 137 References Revision History Date Version # Revision 11/24/99 Initial release

XAPP169 specifications

Xilinx XAPP169 is a pioneering application note that delves into the design and implementation of high-performance digital signal processing (DSP) systems. It serves as a reference guide for engineers and designers looking to leverage Xilinx Field Programmable Gate Arrays (FPGAs) for sophisticated DSP applications. The document provides a comprehensive overview of the techniques and methodologies necessary to harness the power and flexibility of FPGA technology in DSP design.

One of the main features of XAPP169 is its focus on the integration of various DSP functions, including filtering, modulation, and Fourier transforms. By utilizing the inherent parallelism of FPGAs, designers can achieve significant performance enhancements compared to traditional DSP implementations. This parallel processing capability allows for real-time processing of high-bandwidth signals, making XAPP169 ideal for applications such as telecommunications, aerospace, and medical imaging.

The application note emphasizes the use of Xilinx’s advanced tools and libraries, such as the Xilinx System Generator for DSP and the Xilinx Vivado Design Suite. These tools facilitate the modeling, simulation, and synthesis of DSP algorithms tailored to specific requirements, enabling a rapid development cycle. By providing pre-optimized building blocks and IP cores, XAPP169 streamlines the design process, reducing time-to-market for new products and innovations.

Additionally, XAPP169 highlights the ability to leverage high-speed serial transceivers present in Xilinx FPGAs. These transceivers enable reliable transmission of data across long distances with minimized latency and optimized bandwidth utilization. The application note outlines various techniques for managing signal integrity and maximizing throughput, ensuring that designs can meet the stringent requirements of modern DSP applications.

Another characteristic of XAPP169 is its attention to resource utilization and optimization strategies. The document discusses how to balance performance with area and power consumption, which is crucial in embedded applications where space and power are at a premium. By employing advanced synthesis strategies and leveraging the capabilities of Xilinx’s architecture, designers can create efficient and scalable DSP systems.

In summary, Xilinx XAPP169 serves as an invaluable resource for engineers seeking to harness the capabilities of FPGAs in DSP applications. With its focus on high-performance design, integration of advanced tools, and optimization strategies, it opens up new possibilities for innovation in various fields where digital signal processing is essential.